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Reliability assessment is very important in semiconductor manufacturing, and we need to setup and maintain an efficient and effective reliability baseline (BL) management system to, for example, assess reliability risks, to dispose impacted lots, and to release equipment. To achieve these goals, we propose a corresponding flow and pinpoint the critical points to establish and maintain reliability BLs. To provide insights to readers by actual cases on reliability BL analyses and applications, we setup and analyze the BLs for the electric-field acceleration factor and activation energy of gate oxide, the gate voltage exponent of device Negative Bias Temperature Instabilities (NBTI), and the parameters of interconnect model for current density and activation energy. We also find the enriched reliability BL database does benefit line excursion disposition, process optimization, quicker judgment on the reliability impacts of nonconformance, feasibility studies of process changes, faster tool releases, risk assessments of common reliability tests, and earlier root cause identifications of abnormality by narrowing down failure mechanisms. [ABSTRACT FROM AUTHOR]

The limitation of the trend test in SPC is reviewed. The current Nelson's run test for the six or seven consecutive increasing or decreasing points cannot detect non-monotonic increasing or decreasing trend that is frequently encountered in industries. This paper proposes the reverse arrangement test (RAT) to replace the current SPC trend test rule in order to detect both non-monotonic and monotonic increasing or decreasing trends. The theory of RAT is reviewed and we point out the errors in the tables from a well-known and most frequently referenced paper on RAT. The corrected tables of accumulated probabilities for each total reverse arrangement for N = 3 to 12 are presented. The false alarm rate from RAT is verified with excellent accuracy by 108 data points simulating stable normal distributed process. Real examples from the semiconductor manufacturing illustrate that 7 non-monotonic increasing points can be detected by RAT with the same false alarm rate as for the 6 monotonic increasing trend, while sometimes none of the current WECO and Nelson's rules can detect such abnormal pattern. Applications of RAT in IC SPC and WLRC (Wafer Level Reliability Control) show RAT is much more powerful than conventional monotonic trend tests in detecting nonconformance. [ABSTRACT FROM AUTHOR]