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The grid forming (GFM) converter may undesirably output a higher current during the recovery stage than fault duration due to its transient angle swing, which would cause the power devices to face the risk of overcurrent or even damage in both the fault stage and the recovery stage. In this letter, the current power angle plane is presented for the current trajectory description and the mechanism of the recovery overcurrent (ROC) issue is revealed through the proposed concept of critical recovery angle (CRA). On top of that, the power angle relationship in the critical ROC state is described in detail and the ROC boundary is further characterized accurately. Moreover, an analytical calculation method of CRA is proposed to identify whether the ROC phenomenon occurs, which is well validated by a series of experiments. The proposed method depicts the inherent relationship between the current behavior and power angle motion of GFM converters quantitatively and intuitively, and it may provide some new insights into the transient analysis and control optimization of GFM converters.

The dual active bridge converter using series-connected SiC mosfets (S-SiC) has attracted considerable interest in medium voltage power conversion. However, under certain operating conditions, S-SiC tends to lose zero voltage switching-on (ZVS-on), which severely impacts the converter's efficiency and S-SiC's reliability. This article proposes an enhanced phase shift segmentation modulation (EPSS) to achieve ZVS-on of S-SiC over a wide range of voltage ratio and transmission power. The foundation of this work lies in the analysis of the soft-switching boundary, which uncovers the auxiliary soft-switching effect linked to the magnetizing current and voltage ratio. This insight facilitates the derivation of an equivalent voltage ratio, simplifying parameter design. Furthermore, phase shift ratio combinations are expanded based on soft-switching boundaries to propose EPSS. A rigorous analysis of operational modes and characteristics reveals that EPSS can achieve a significant reduction in S-SiC loss with limited low voltage (LV) side arm loss incurred. Finally, experiments validate EPSS's effectiveness in achieving soft-switching and enhancing overall efficiency.

The islanding detection method (IDM) with current disturbance of selected frequency (CDSF) in dc microgrids is gaining extensive attention thanks to its small nondetection zone and good power quality. However, the CDSF is implemented through a positive feedback loop and thus will lead to instability issues for the dc microgrid even in the grid-connected mode. Conventional stabilization control is generally employed on the distributed generator (DG) side and usually requires an additional uninterrupted communication process, which therefore decreases system reliability. In this article, the impedance model of the dc microgrid is established first to reveal the interaction instability mechanism between the voltage source converter (VSC) and DG equipped with CDSF IDM. On top of that, the notch-filter-based active damping method is proposed on the VSC side to avoid amplitude intersection of impedance near the selected resonant frequency, which effectively mitigates the instability caused by the islanding detection loop without relying on communication. Moreover, the parameter design method is further summarized to provide guidance for the selection of notch bandwidth in the proposed damper. In this manner, the stability of the grid-connected system can be improved while the islanding detecting speed is enhanced. In the end, the effectiveness of the proposed stabilizing method is verified by the experiments.

With the increasing penetration of virtual synchronous generator (VSG)-controlled inverters in the renewable power system, the transient stability analysis of the paralleled VSG system with the interactions between inverters is urgently needed. However, the large damping effect brought by VSGs on the relative motion between inverters is still unclear, which impedes the accurate transient stability evaluation of the paralleled system. In this article, the damping effect in the paralleled VSG system is explored with the recognition of the uniform and the nonuniform damping effects, and it is found that the large damping in VSGs may also destabilize the system under some nonuniform damping configurations. To figure out the influential mechanism of the damping terms in the paralleled VSGs, two customized phase portraits are presented to visualize the uniform and the nonuniform damping energies with the respective areas. On top of that, a damping energy approximation method is further proposed to quantitatively depict damping energy, and thus, the critical clearing time can be analytically solved. The effectiveness of the proposed method is validated by both simulation results and control hardware-in-loop experimental results. The results demonstrate that the proposed method can clearly characterize the large damping effects and accurately solve the critical fault clearing point, which may provide some new insights for the transient stability analysis of the paralleled VSG system.

Unintentional islanding events cause potential threats to the safety of dc microgrids. Selected frequency islanding detection is considered a promising technology thanks to its good power quality and high detection accuracy. However, the conventional frequency-domain-based islanding detection parameter boundary cannot consider the impact of detection time, which causes a quite slow detection speed and thus leads to detection failure. To overcome this obstacle, a linear model of the islanding dc system is developed first to analyze the steady-state response of the voltage at the point of common coupling (PCC). On top of that, the components of the islanding system characteristic equation are analyzed based on modal analysis, which lays a good foundation for simplifying the time-domain response model of the PCC voltage. Then, the oscillation trajectory of the PCC voltage triggered by the islanding event is characterized in the time domain, which facilitates the analysis and calculation of islanding detection time. Furthermore, the boundary of the islanding detection parameters considering the detection time effect is accurately depicted to guide the resonator design. In this manner, the effect of resonant parameters on the detection time can be evaluated visually while the fast detection speed is also ensured. Finally, the proposed method is validated in simulations and hardware-in-loop experiments.

Due to ultrafast switching speed and high-frequency switching of silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (mosfets), crosstalk effect, high turn-on losses and electromagnetic interference are becoming constraints to the efficient and safe applications of SiC mosfets. The split-output structure has attracted widespread attention due to its advantages of overcoming the above constraints by integrating decoupling inductors. Thereby, it fully exploits the potential benefits of SiC mosfets. In this article, the effects of the split inductors on short-circuit characteristics of split-output power module are analyzed. An analytical model of the split-output power module is established to compare the electrical characteristics of the split inductors under normal operation and short-circuit faults. A dedicated short-circuit protection method is proposed based on the detection of the voltage pulse duration across the split inductors. The protection method is validated by hard switching fault and fault under load experiments. The results show that the short-circuit power device can be shut down when the short-circuit current is much lower than the continuous drain current. Besides, the short-circuit energy of the power device has the same order of magnitude as the dissipated energy under normal switching, which avoids degradation and even destruction of SiC mosfets under short-circuit faults.

The medium-voltage grid emulator is gaining popularity for testing grid-code compliance of large-capacity converters for renewable energy resources. The cascaded H-bridge converter based on active-front-ends is a promising candidate for high-power grid emulators owing to its high modularity and extendibility. However, the cascaded H-bridge topology-based grid emulator suffers the undesired and unpredictable large dc-link voltage ripple under output voltages with multiple-frequency components, e.g., when emulating the grid voltage flickers and harmonics. In this article, the dc-link voltage ripple characteristics under multi-frequency output conditions are analyzed and a dc-link ripple suppression method adopting harmonic current injection is proposed. The injected current reference is generated by reconstructing the dc-link output current and added to the original active-front-end current control loop. Compared with the existing control methods, e.g., proportional-integral-resonant (PIR), the proposed method has a good voltage ripple suppression effect, especially for multi-frequency outputs. Furthermore, the proposed idea does not need complicated calculation or extra control loops and provides a feedforward reference for the current control, leading to a good dynamic response of dc-link voltage control. Finally, the performance of this suppression control scheme is verified on two 1200 V@40 kW power electronics building blocks of a cascaded H-bridge converter.

In this paper, a sub-module capacitor voltage control (SCVC) is proposed to alleviate the energy balance restriction in the alternate arm converter (AAC). Considering that the arm inductor has a great impact on the energy exchange in AAC, the current commutation modulation is demonstrated firstly in this paper to extend the operating range. Then, the current commutation process for the alternate arms is further explored and derived by analytical expressions. During the commutation process, the current through the turning-on arm is rising, while the contralateral arm current is reversely freewheeling through the diodes of director switches (DSs). Moreover, the mechanism of the capacitor voltage sag caused by commutation process is clarified, which provides the fundamental to design the controller. In this manner, the sub-module capacitor voltage control (SCVC) strategy is further provided to compensate the capacitor voltage sag and achieve the normal operating in the four quadrants. Finally, the simulation and experimental results are both performed to verify the effectiveness of the presented modulation and control strategy in the different conditions.

A 5-to-0.4 $\sim $ 1.2-V reconfigurable capacitive-sigma dc– dc converter with 98.4% peak efficiency is presented. By input-series and output-shunt an efficient unregulated 2:1 switched-capacitor (SC) converter with a reconfigurable hybrid Dickson Buck converter, the proposed converter achieves high efficiency for the entire output voltage and current ranges. Besides, the proposed converter also demonstrates decent regulation and transient responses. The prototype achieved 98.4% and 90.4% peak efficiency at 1.2- and 0.4-V output, respectively. The output shows a static error of 1.1 mV and under-/overshoot voltages of –23 and 23.8 mV with 0.1% settling time of 25 and 30 $\mu \text{s}$ , respectively, over 2-A load range. Compared with the prior state of the arts, the converter improves the peak efficiency by 1.5% at voltage conversion ratio (VCR) = 4.2 and by 4.9% at VCR = 12.5.

The damping effect in grid forming (GFM) control is inherently large and thus has great impact on its transient stability. Although qualitative understanding of damping has been developed in recent studies, an analytical and intuitive method for quantitative assessment of damping is still needed to be developed to date. This article visualizes the transient damping energy through the concept of damping area on a tailored phase portrait to physically and intuitively understand the damping effect. On top of that, the damping energy approximation (DEA) method is further proposed to depict transient stability boundary more accurately and evaluate the critical clearing angle analytically. Moreover, the conservativeness of proposed DEA method for GFM converter with both constant terminal voltage control and reactive power-voltage droop control is analyzed in theory and verified in time-domain simulations and control hardware-in-loop experiments. This method quantitatively and visually evaluates the impact of damping on transient stability boundary and critical clearing angle, which avoids complex numerical iterations and may provide some insights into the transient stability analysis of GFM converter.

In electric vehicle (EV) inverter systems, the dc-link capacitor bank becomes a critical obstacle to high power density due to its large volume. The dc-link capacitor bank commonly adopts a multicore parallel structure. The challenges exist in the current sharing of parallel capacitor cores because of the imbalance of stray parameters in the busbars. A current sharing analysis method aiming at thermal stress for capacitor banks in high-power-density inverters based on the characteristic matrix is proposed in this article. First, the design basis of dc-link capacitors is given theoretically. Then, the complex coupling impedance model between multiple ports on capacitor busbars is mathematically derived by the matrix method, revealing the current resonance phenomenon of parallel capacitor cores affected by stray parameters. Next, three capacitor banks are evaluated by the proposed current sharing model. The influence of capacitor core arrangement and terminal position on current sharing is explored, which can guide capacitor banks’ high-power-density structure and heat dissipation design. Finally, an experimental platform is built with customized capacitor samples. The experimental results are consistent with the analysis results of the model, verifying the proposed method.

The nonuniform large damping introduced by grid-forming (GFM) converters in multi-machine system could destabilize the power system under large disturbance, which may bring new challenges to the safe operation of future power system. In this letter, the mathematic model of GFM-penetrated multi-machine system considering large damping effect is established first, and the concept of uniform and nonuniform damping energy is further proposed to clarify the impact of different damping components. Moreover, the influence mechanism of nonuniform damping on system transient stability is revealed, which implies that the large damping in only part of generators could destabilize the system. The analysis result may provide some new insights for the transient stability analysis of future power system with nonuniform damping effect.

In recent years, wide bandgap (WBG) devices such as silicon carbide (SiC) MOSFET have shown a promising future for achieving high-power-density design in power electronic converters. However, its wide applications are still constrained by the high cost. The SiC and Si hybrid multilevel converter is a high-performance and cost-effective solution. However, these hybrid device converters have limited control degree of freedom for other control objectives such as dc bus capacitor voltage balancing. In this article, a multistep soft-switching modulation scheme is proposed for hybrid device multilevel converters. It utilizes dual-current-path (DCP) state and other intermediate states to create soft-switching conditions for all Si devices during the switching between multiple voltage levels. As a result, without adding huge additional switching losses, all switches in the hybrid device converters can operate in high frequency (HF). The proposed modulation scheme is applied to a hybrid four-level (4L) converter and realizes the capacitor voltage balancing over the entire operation operating range but also guarantees the soft-switching of all Si devices. The modulation scheme and the control effects for 4L hybrid converters are verified by experiments.

In this article, a multiport network approach is proposed to analyze the forced oscillations issue for the multichips power module. First, experimental results indicate the presence of multiple resonance points caused by forced oscillations during the switching process of multichip power modules. Due to the complex distribution of parasitic parameters within the module, it is challenging to establish an accurate analytical model. Therefore, this article proposes a method based on multisoftware collaborative simulation to extract the corresponding impedance of different chip ports. In addition, the impact of bus parasitic inductance and chip capacitances on port impedance is obtained. Compared with the experimental result, the error of dominant frequency obtained by the proposed model is less than 3%. Furthermore, the sensitivity of the spatial near-field spectrum to bus voltage and load current is studied based on experimental results. Finally, the suppression methods for forced oscillations are proposed based on the aforementioned theoretical analysis from the perspectives of both chips and packaging. The effectiveness of proposed methods is verified through experimental results.