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The oil impregnated paper capacitance graded transformer bushings serves as the external connection device of the transformer to support and connect the insulation, and its insulation state is related to the safe and stable operation of substation equipment.In this paper, a simulation model of 110kV oil impregnated paper capacitance graded transformer bushings is constructed on the commercial finite element software platform based on the actual size of the bushing and the principle of equal capacitance and steps. The paper calculate the potential and radial electric field distribution of the bushing under the normal working voltage, and analyze the influence of the aluminum plate on the radial electric field distribution of the bushing, verifying the rationality of the design principle based on equal capacitance and steps. [ABSTRACT FROM AUTHOR]

This paper focuses on the in-depth analysis of the physical mechanism of the broadband frequency domain spectroscopy of oil-paper insulation. The complex permittivity shows two low-frequency dispersion phenomena, and the real part of the complex conductivity exhibits two slope changes under the synergistic effect of aging and moisture. The two slope changes are mainly attributed to the migration characteristics of water molecules and polar aging products with a degradation of the oil-paper insulation, resulting in the transition of the frequency dependence between the DC conductivity and AC conductivity. When the oil-paper insulation deteriorates seriously, the imaginary part of the dielectric modulus shows double relaxation peaks. Physical models of parasitic capacitance and molecular polarity interface polarization are proposed to reveal the physical mechanism of the double relaxation peaks. The left peak of the double relaxation peaks is caused by the accumulation of water molecules and polar aging products at the electrode/insulation interface, and the right peak is due to the charge disturbance of the cellulose molecular chain surface. This paper can provide theoretical support and technical guidance for the condition diagnosis and evaluation of oil-paper insulation. [ABSTRACT FROM AUTHOR]

Paper-based biofuel cells have the potential to serve as health monitoring devices for urinary glucose and volume by incorporating the fabricated electrodes into nursing diapers. In this study, we evaluate the output power and stability of a biofuel cell by combining 3D impedance measurement and admittance analysis. The 3D impedance-based analysis method can simultaneously detect changes in the overall electrode structure of the enzyme electrode and in the quantity of active enzymes and mediators on the electrode surface. The biofuel cell electrodes were fabricated via screen-printing, using polydimethylglycidyl (poly-GMA)- modified MgO-templated carbon (GMgOC) or poly-GMA-unmodified MgO-templated carbon (NMgOC). The enzymes used were flavin adenine dinucleotide-dependent glucose dehydrogenase and bilirubin oxidase, with Azure-A serving as the mediator. Admittance analysis was utilized to measure the enzyme activity and estimate the charge transfer resistance by extrapolating the spectra obtained through admittance analysis. The charge transfer resistances of both electrodes exhibited a greater stability for the GMgOC electrode. This can be attributed to the covalent immobilization of the enzyme and mediator on the electrode facilitated by GMgOC, effectively suppressing enzyme and mediator elution. The electric double-layer capacitance values of both electrodes indicated the overall stability of the electrode structure during the measurement. [ABSTRACT FROM AUTHOR]

Polypyrrole@cellulose fibers (PPy@CFs) electrode materials are promising candidates in the energy storage. Various strategies have been pursued to improve their electrochemical performance. However, the poor conductivity, specific capacitance, and cyclic stability still hindered its application. Compared with the previous studies, we selected AQS with electrochemical activity as a dopant to improve these defects. It exhibits a high capacitance of 829.8 F g−1 at a current density of 0.2 A g−1, which is much higher than that of PPy@CFs electrode material (261.9 F g−1). Moreover, the capacitance retention of PPy:AQS/p-PTSA@CFs reaches up to 96.01% after 1000 cycles, indicating superior cyclic stability. Therefore, this work provides an efficient strategy for constructing high-performance electrode materials for energy storage. [ABSTRACT FROM AUTHOR]

Hybrid Sn–Co binary oxide with different Sn/Co feeding molar ratios on carbon paper are successfully obtained using a facile hydrothermal method followed by a post-annealing procedure. The results of electrochemical tests show that the electrode with a feeding molar ratio of 1:4 (named as Sn 1 Co 4) has better electrochemical performance than that of the others. The specific capacitance can achieve 937.4 F g−1at 5 mV s−1 (580.8 F g−1 at 1 A g−1), as well as the capacitance retention is 97.5% after the galvanostatic charge-discharge for 20000 cycles at 30 A g−1. These results demonstrate that the Sn 1 Co 4 can be considered as a potential electrode material for the next generation supercapacitor. • Hybrid Sn–Co binary oxide nanosheets grown on carbon paper were synthesized. • Porous Sn 1 Co 4 nanosheets gave better electrochemical storage properties. • The synergistic effect of SnO 2 and Co 3 O 4 is beneficial to improve the capacity. [ABSTRACT FROM AUTHOR]

The analysis of dielectric response function obtained from the power transformer is a well-accepted technique in insulation diagnosis. A convenient way of analysing time-domain dielectric response φ(t) is the formulation of simple resistance -capacitance-based circuits like the conventional Debye model (CDM) or the modified Debye model (MDM) that are capable of modelling φ(t). However, available techniques do not guarantee unique branch parameters of such circuits for a given φ(t). In fact, the branch parameters are known to depend on the curve-fitting procedure opted during model formulation. This makes accuracy of CDM and MDM parameter-based diagnosis techniques less reliable. Furthermore, it seems logical to analyse the time-domain dielectric response of oil-paper insulation using a model containing time-varying parameters. In this study, a methodology is proposed using which such an insulation model (containing time-varying parameters) is formulated using timedomain insulation response. Related analysis presented suggests that the proposed model is immune to problems associated with available insulation models (containing time-invariant parameters). The performance of the proposed model in indicating insulation condition is tested on data obtained from several real-life power transformers. [ABSTRACT FROM AUTHOR]

To facilitate better interpretation of dielectric response measurements--thereby directing numerical evidence for condition assessments of oil-paper-insulated equipment in high-voltage alternating current (HVAC) transmission systems--a novel approach is presented to estimate the parameters in the extended Debye model (EDM) using wideband frequency domain spectroscopy (FDS). A syncretic algorithm that integrates a genetic algorithm (GA) and the Levenberg-Marquardt (L-M) algorithm is introduced in the present study to parameterize EDM using the FDS measurements of a real-life 126 kV oil-impregnated paper (OIP) bushing under different controlled temperatures. As for the uncertainty of the EDM structure due to variable branch quantity, Akaike's information criterion (AIC) is employed to determine the model orders. For verification, comparative analysis of FDS reconstruction and results of FDS transformation to polarization--depolarization current (PDC)/return voltage measurement (RVM) are presented. The comparison demonstrates good agreement between the measured and reconstructed spectroscopies of complex capacitance and tan δover the full tested frequency band (10-4 Hz-10³ Hz) with goodness of fit over 0.99. Deviations between the tested and modelled PDC/RVM from FDS are then discussed. Compared with the previous studies to parameterize the model using time domain dielectric responses, the proposed method solves the problematic matching between EDM and FDS especially in a wide frequency band, and therefore assures a basis for quantitative insulation condition assessment of OIP-insulated apparatus in energy systems. [ABSTRACT FROM AUTHOR]

Background and Objectives: In this paper, a novel structure as a Folded-Mirror (FM) Trans-impedance Amplifier (TIA) is designed and introduced for the first time based on the combination of the current-mirror and the folded-cascade topologies. The trans-impedance amplifier stage is the most critical building block in a receiver system. This novel proposed topology is based on the combination of the current mirror topology and the folded-cascade topology, which is designed using active elements. The idea is to use a current mirror topology at the input node. In the proposed circuit, unlike many other reported designs, the signal current (and not the voltage) is being amplified till it reaches the output node. The proposed TIA benefits from a low input resistance, due to the use of a diode-connected transistor, as part of the current mirror topology, which helps to isolate the dominant input capacitance. So, as a result, the data rate of 5Gbps is obtained by consuming considerably low power. Also, the designed circuit employs only six active elements, which yields a small occupied chip area, while providing 40.6dBΩ of trans-impedance gain, 3.55GHz frequency bandwidth, and 664nArms input-referred noise by consuming only 315µW power using a 1V supply. Results justify the proper performance of the proposed circuit structure as a low-power TIA stage. Methods: The proposed topology is based on the combination of the current mirror topology and the folded-cascade topology. The circuit performance of the proposed folded-mirror TIA is simulated using 90nm CMOS technology parameters in the Hspice software. Furthermore, the Monte-Carlo analysis over the size of widths and lengths of the transistors is performed for 200runs, to analyze the fabrication process. Results: The proposed FM TIA circuit provides 40.6dBΩ trans-impedance gain and 3.55GHz frequency bandwidth, while, consuming only 315µW power using a 1V supply. Besides, as analyzing the quality of the output signal in the receiver circuits for communication applications is vital, the eye-diagram of the proposed FM TIA for a 50µA input signal is opened about 5mV, while, for a 100µA input signal the eye is opened vertically about 10mV. So, the vertical and horizontal opening of the eye is clearly shown. Furthermore, Monte-Carlo analysis over the trans-impedance gain represents a normal distribution with the mean value of 40.6dBΩ and standard deviation of 0.4dBΩ. Also, the value of the input resistance of the FM TIA is equal to 84.4Ω at low frequencies and reaches the value of 75Ω at -3dB frequency. The analysis of the effect of the feedback network on the value of the input resistance demonstrates the input resistance in the absence of the feedback network reaches up to 1.4MΩ, which yields the importance of the existence of the feedback network to obtain a broadband system. Conclusion: In this paper, a trans-impedance amplifier based on a combination of the current-mirror topology and the folded-cascade topology is presented, which amplifies the current signal and converts it to the voltage at the output node. Due to the existence of a diode-connected transistor at the input node, the input resistance of the TIA is comparatively small. Furthermore, four out of six transistors are PMOS transistors, which represent less thermal noise in comparison with NMOS transistors. Also, the proposed Folded-Mirror topology occupies a relatively small area on-chip, due to the fact that no passive element is used in the feedforward network. Results using 90nm CMOS technology parameters show 40.6dBΩ trans-impedance gain, 3.55GHz frequency bandwidth, 664nArms input-referred noise, and only 315µW power dissipation using a 1volt supply, [ABSTRACT FROM AUTHOR]

A capacitor formed of fluid-impregnated paper metalized on one side and a polymer film results in a relaxation peak caused by the much more rapid polarization of the dielectric fluid impregnated paper relative to the polymer film. This results in the capacitance being a function of frequency, with a substantial increase in capacitance at very low frequencies. A theory for such a capacitor is developed and compared with measurements on actual capacitors with relatively good agreement. The implications of the theory for discharge current and discharge efficiency are discussed. [ABSTRACT FROM AUTHOR]

Large-capacitance and ultrahigh-rate electrochemical supercapacitors (UECs) with frequency response up to kilohertz (kHz) range are reported using light, thin, and flexible freestanding electrodes. The electrode is formed by perpendicularly edge oriented multilayer graphene/thin-graphite (EOG) sheets grown radially around individual fibers in carbonized cellulous paper (CCP), with cellulous carbonization and EOG deposition implemented in one step. The resulted ∼10 μm thick EOG/CCP electrode is light and flexible. The oriented porous structure of EOG with large surface area, in conjunction with high conductivity of the electrode, ensures ultrahigh-rate performance of the fabricated cells, with large areal capacitance of 0.59 mF cm −2 and 0.53 mF cm −2 and large phase angle of −83° and −80° at 120 Hz and 1 kHz, respectively. Particularly, the hierarchical EOG/CCP sheet structure allows multiple sheets stacked together for thick electrodes with almost linearly increased areal capacitance while maintaining the volumetric capacitance nearly no degradation, a critical merit for developing practical faraday-scale UECs. 3-layers of EOG/CCP electrode achieved an areal capacitance of 1.5 mF cm −2 and 1.4 mF cm −2 at 120 Hz and 1 kHz, respectively. This demonstration moves a step closer to the goal of bridging the frequency/capacitance gap between supercapacitors and electrolytic capacitors. [ABSTRACT FROM AUTHOR]

Measurements of capacitors made with paper sheets reveal a significant decrease in capacitance with increasing frequency from 10 to 100,000 Hz, offering a simple demonstration of complex dielectric phenomena using common equipment. [ABSTRACT FROM AUTHOR]

Highlights: [•] Porous carbon nanofiber paper was prepared by surface chemical etching. [•] Specific surface area and surface functionality were greatly increased. [•] Carbon nanofiber paper had high specific capacitance of 362Fg− 1. [•] High power density, energy density and good cycling stability were combined. [•] The carbon paper can find applications in desalination, absorption and catalysis. [ABSTRACT FROM AUTHOR]

Rapid and accurate clinical assessment of hemostasis is essential for managing patients who undergo invasive procedures, experience hemorrhages, or receive antithrombotic therapies. Hemostasis encompasses an ensemble of interactions between the cellular and non-cellular blood components, but current devices assess only partial aspects of this complex process. In this work, we describe the development of a new approach to simultaneously evaluate coagulation function, platelet count or function, and hematocrit using a carbon nanotube-paper composite (CPC) capacitance sensor. CPC capacitance response to blood clotting at 1.3 MHz provided three sensing parameters with distinctive sensitivities towards multiple clotting elements. Whole blood-based hemostasis assessments were conducted to demonstrate the potential utility of the developed sensor for various hemostatic conditions, including pathological conditions, such as hemophilia and thrombocytopenia. Results showed good agreements when compared to a conventional thromboelastography. Overall, the presented CPC capacitance sensor is a promising new biomedical device for convenient non-contact whole-blood based comprehensive hemostasis evaluation. • Capacitance based non-contact multiparameter hemostasis assessment is realized for the first time. • Multiple key clotting biomarkers were evaluated simultaneously with high sensitivity & accuracy. • Sensor showed good agreements with commercial thromboelastography. • Rapid screening for pathological conditions was demonstrated using the sensor. • Sensor has potential applications as inexpensive POC blood analyzer. [ABSTRACT FROM AUTHOR]

As a critical component of a high-voltage direct current (HVDC) transmission system, resin impregnated paper (RIP) wall bushing has become a weak point because of its surface charge accumulation. This paper studies a model RIP wall bushing core designed by the equal capacitance method. The stationary resistive field along the gas–solid interface of the RIP wall bushing core is investigated theoretically by a gas model, which considers the non-linearly field-dependent volume conductivity. The results show that the gas conductivity along the core surface tends to be an arched distribution from the high-voltage conductor to the end shielding screen. The surface charge mainly accumulates at the turning point of the radius, which may threaten the core's insulation. Then, the surface charge is obtained through a measurement system, where the experimental results are highly consistent with the simulation results. Considering the time constant of charge dissipation is nearly 15 min, it would be better to measure the surface charge on one axial direction of RIP wall bushing core after each voltage application. The simulation and experimental results of this paper can guide the design of a RIP wall bushing core. [ABSTRACT FROM AUTHOR]

Paper-based microfluidic devices have the potential of being a low-cost platform for diagnostic devices. Electrical circuit analogy (ECA) model has been used to model the wicking process in paper-based microfluidic devices. However, material characteristics such as absorption capacity cannot be included in the previous ECA models. This paper proposes a new model to describe the wicking process with liquid absorption in a paper strip. We observed that the fluid continues to flow in a paper strip, even after the fluid reservoir has been removed. This phenomenon is caused by the ability of the paper to store liquid in its matrix. The model presented in this paper is derived from the analogy to the current response of an electric circuit with a capacitance. All coefficients in the model are fitted with data of capillary rise experiments and compared with direct measurement of the absorption capacity. The theoretical data of the model agrees well with experimental data and the conventional Washburn model. Considering liquid absorption capacity as a capacitance helps to explain the relationship between material characteristics and the wicking mechanism. [ABSTRACT FROM AUTHOR]

[Display omitted] • Cellulose nanofibrils (CNF) are used as building blocks for PEDOT:PSS to make strong and flexible nanopaper (PEDOT:PSS/CNP). • The optimized PEDOT:PSS/CNP exhibits high tensile strength (72 MPa) and high conductivity (66.67 S/cm). • The PEDOT:PSS/CNP can be directly used as flexible electrodes for supercapacitors. • The supercapacitor shows a high specific capacitance (854.4 mF cm−2 at 5 mV/s) and a high energy density (30.86 μWh cm−2). • The supercapacitor exhibits excellent cycling stability with 95.8% capacitance retention after 10,000 cycles. PEDOT:PSS has been widely used as the electrode materials for supercapacitors. However, processing PEDOT:PSS bulk films with good flexibility and mechanical stability is still challenging. The present study is aimed at providing a facile and low-cost strategy for the preparation of mechanically strong and conductive PEDOT:PSS based bulk films by using Cellulose nanofibrils (CNF) as building blocks. PEDOT:PSS/CNF suspension was firstly prepared via a simple in situ polymerization process. Afterwards, flexible and conductive PEDOT:PSS/CNF nanopaper (PEDOT:PSS/CNP) were prepared from the PEDOT:PSS/CNF suspension by vacuum filtration and Dimethyl sulfoxide (DMSO) post-treatment. Results showed that the optimized PEDOT:PSS/CNP exhibited excellent flexibility, high tensile strength (72 MPa), and high electrical conductivity (66.67 S/cm). Finally, a symmetric supercapacitor was assembled using the PEDOT:PSS/CNP as electrodes. The assembled supercapacitor could deliver the maximum areal specific capacitance of 854.4 mF cm−2 (corresponding to 122.1F cm−3) at 5 mV/s and offer the highest areal energy density of 30.86 μWh cm−2 (corresponding to 4.41 mWh cm−3), which are among the highest values reported for PEDOT:PSS based supercapacitors. More importantly, the assembled supercapacitor showed remarkable cycling stability with the capacitance retention of 95.8% after 10,000 charge/discharge cycles. Considering the good mechanical properties and excellent electrochemical performance, the PEDOT:PSS/CNP could be a promising electrode material for flexible supercapacitors. [ABSTRACT FROM AUTHOR]

Continuous carbon fiber polymer-matrix composites in unprecedented antiferroelectric coupling, as enabled by stacking composites with positive value (up to 400) and negative value (down to −600) of the electric permittivity, provide exceptionally high through-thickness permittivity up to 78,000 (≤2.0 MHz), corresponding to a capacitance of 370 μF/m. The high capacitance is consistent with the equation for negative and positive capacitors in series. The permittivity tailoring of the composites involves dielectric cellulosic tissue paper interlaminar interlayers. Negative permittivity (not previously reported for carbon fiber composites) requires the paper to be wet with tap water (resistivity 1.5 kΩ cm) during incorporation in the composite, though the water evaporates and leaves ions at very low concentrations during composite fabrication, and also requires optimum through-thickness resistivity (e.g., 1 kΩ cm, as given by paper thickness 35 μm); it is probably due to interactions between the functional groups on the carbon fiber surface and the residual ions (mainly chloride) left after tap water evaporation. [ABSTRACT FROM AUTHOR]

This paper presents the manufacturing and testing methods of 30kV and 33nF high voltage filter capacitors. One of the biggest advantages of small companies is that they are able to produce a high diversity of capacitors in small quantities. One of the prices of this flexibility is a higher level of manual manufacturing process in production. But this higher level of manual manufacturing does not mean lower quality in the final product. For high quality products in the high voltage industry, it is necessary to do routine tests in all of the products. For high voltage capacitors the following three tests must be done to ensure quality: voltage strength test, partial discharge test, capacitance and dissipation factor test. The capacitance and dissipation factor test have to be done at different voltage levels. The voltage strength test has to be done at least 20% higher than the rated voltage. This kind of test gives us information not only about the quality of the product itself, but about distribution of the capacitance for example, or about the strength of the production process, and about the quality management system of the company. [ABSTRACT FROM AUTHOR]

The DC distribution network is a low-inertia system, which is very sensitive to load disturbance, system failure, and other factors. By adding virtual capacitance to the converter connected to the power supply, the virtual inertia of the DC power grid can be improved. Firstly, this paper proposes a strategy for adjusting virtual capacitance based on the voltage change rate to achieve adaptive control of virtual inertia, which enables the converter to quickly absorb or release energy during power fluctuations. Secondly, the adaptivity of the strategy is improved and the main control parameters in the proposed control method are qualitatively analyzed. Finally, the four-terminal photovoltaic storage DC distribution network system is constructed. Through Simulink, the adaptive virtual inertia control is incorporated on the battery side to simulate and validate the effectiveness of the strategy and the rationality of parameter analysis. The results show that this method can provide flexible and adjustable inertia support for DC grids and improve the voltage stability of DC grids. [ABSTRACT FROM AUTHOR]

In searching for the optimal control strategy of sub-module capacitance voltage equalization of Modular Multilevel Converter (MMC), the most important issue is how to address the significant increase in computing time of the controller, switching frequency of the sub-module, device switching loss and MMC fault rate led by the increase in the number of sub-modules of the upper/lower bridge arm of the MMC. Therefore, this paper proposes a control strategy based on the retaining factor method + improved quick sort, namely, an improved quick sort algorithm is used to sort the sub-module capacitance voltages to reduce the amount of computation of the MMC controller; at the same time, a retaining factor is introduced to participate in the improved quick sort to significantly reduce the switching frequency of the sub-module. MMC of large ship grid-connected photovoltaic power system is taken as a research object in this paper, a 31-level MMC model is built in Matlab/Simulink. Simulation results verify that the improved quick sort has a good rapidity compared to the algorithms of bubble sort, quick sort, bidirectional bubble sort, and improved merge sort, that the retention factor method has a good frequency reduction effect, and that the proposed retention factor + improved quick sort can provide a good performance compared to improved quick sort and retention factor + improved merge sort under conditions of the normal operation and introducing disturbance. [ABSTRACT FROM AUTHOR]

In today's healthcare landscape, MRI (magnetic resonance imaging) plays a pivotal role in early diagnosis and treatment decisions. However, the quest for higher frequencies to achieve micron‐level resolutions poses technological challenges. This paper focuses on coils and capacitors, with special attention to air gap considerations for movable electrodes. The paper delves into the development of adjustable capacitors using high‐fired NP0 ceramic, tailored for 128‐MHz MRI systems. These capacitors boast impressive specs: a 3‐kV breakdown voltage (VBreakdown), a 3‐pF minimum capacitance (Cmin), a 30‐pF maximum capacitance (CMax), and a 1.5‐pF stepwise capacitance variation (Cvariation step). Notably, they enhance breakdown voltage while preserving frequency stability with MgTiCa ceramic between the fixed and mobile electrode, critical for adaptive blocks. Leveraging geometrical parameters analyzed through the ANSYS simulator, the authors meticulously designed an optimized 25–40 pF capacitor with a 15‐mm height and 1600 mm2 surface area. Post‐fabrication and sintering, extensive testing using a vector network analyzer across 10 MHz to 100 MHz validated performance against simulated expectations. [ABSTRACT FROM AUTHOR]

An analytical SS model is presented to observe the subthreshold swing (SS) of a junctionless gate-all-around (GAA) FET with ferroelectric in this paper. For the gate structure, a multilayer structure of metal-ferroelectric-metal-insulator-semiconductor (MFMIS) was used, and the SS was calculated in 15 ⩽ P r ⩽ 30 μ C / c m 2 and 0.8 ⩽ E c ⩽ 1.5 M V / c m , which are the ranges of remanent polarization and coercive field suggested in various experiments in the case of HZO as the ferroelectric material. It was found that the SSs from the presented analytical SS model agree well with those derived from the relationship between drain current and gate voltage using a 2D potential distribution in the range of device parameters used for simulation. As a result of analyzing the SS of the junctionless GAA FET with ferroelectric using the analytical SS model presented in this paper, the SS decreased because the voltage across the inner gate decreased when the ferroelectric thickness increased. It was observed that the condition of SS < 60 mV/dec was sufficiently obtained according to changes in device parameters such as channel length, channel radius and ferroelectric thickness, and that the SS maintained a constant value according to the ratio of remanent polarization and coercive field P r / E c . As P r / E c increases, the SS increases as the ferroelectric capacitance increases. As the channel length becomes smaller, the change in SS according to P r / E c is more severe. An analytical SS model is presented to observe the subthreshold swing (SS) of a junctionless gate-all-around (GAA) FET with ferroelectric in this paper. For the gate structure, a multilayer structure of metal-ferroelectric-metal-insulator-semiconductor (MFMIS) was used, and the SS was calculated in and , which are the ranges of remanent polarization and coercive field suggested in various experiments in the case of HZO as the ferroelectric material. It was found that the SSs from the presented analytical SS model agree well with those derived from the relationship between drain current and gate voltage using a 2D potential distribution in the range of device parameters used for simulation. As a result of analyzing the SS of the junctionless GAA FET with ferroelectric using the analytical SS model presented in this paper, the SS decreased because the voltage across the inner gate decreased when the ferroelectric thickness increased. It was observed that the condition of SS < 60 mV/dec was sufficiently obtained according to changes in device parameters such as channel length, channel radius and ferroelectric thickness, and that the SS maintained a constant value according to the ratio of remanent polarization and coercive field P r / E c . As P r / E c increases, the SS increases as the ferroelectric capacitance increases. As the channel length becomes smaller, the change in SS according to P r / E c is more severe. [ABSTRACT FROM AUTHOR]

Pyrotechnic device is the key initiating component of weapon system, and its function reliability will directly affect the triggering of detonation and actuation mechanism. In order to enhance the survival ability of pyrotechnic device in intricate electromagnetic interference environment, it is necessary to carry out in-depth research on the electromagnetic protection technique of pyrotechnic device. In this paper, a new electromagnetic protection circuit based on vertical punch through PN junction device is proposed, which monolithically integrates the circuit with polysilicon semiconductor bridge on a single chip. The Electro-static Discharge (ESD) test was carried out according to the method specified by standard electrostatic standard 500 pF/500 Ω/25 kV, and the ESD capability of the proposed new chip was not less than 25 kV. Compared with the electromagnetic protection circuit by transient voltage suppressor diode based on lateral punch through junction device structure, the new chip increases the effective junction area of PN junction, reduces the current density, and increases the current conduction ability and electrostatic roughness of the diode. The new chip has a larger diode effective junction capacitance, which not only improves the ESD capability but also improves the RF protection capability at the same time. [ABSTRACT FROM AUTHOR]

With the development of the photovoltaic industry; there will be an increasing demand for efficient, high-power density, and low-cost grid interface converters. Compared with two-level inverters, multilevel inverters have the following advantages: (1) lower device voltage ratings; (2) better output filtering spectrum; (3) lower electromagnetic interference (EMI) noise; and (4) higher switching speed capability. However, the complex switching circuit of the multilevel inverter will bring more parasitic inductance, resulting in severe switching overvoltage (ringing). Especially in order to reduce the cost of the inverter, using the long-loop modulation mode, the commutation loop will introduce more parasitic inductance, which will make the overvoltage more serious. Consider that commonly used overvoltage absorption schemes are effective only for overvoltage or suppression of oscillations. Therefore, a new overvoltage absorption circuit is proposed in this paper, which can not only alleviate the overvoltage and ringing phenomena but also suppress the effect of voltage jumps during low-frequency switching on high-frequency input voltage. This overvoltage absorption circuit is characterized by low overvoltage, fast ringing damping, and minimum capacitance. Experiments and simulations are conducted to verify the effectiveness of this overvoltage absorption circuit using a three-level ANPC inverter as a prototype. The results show that the proposed overvoltage absorption circuit can significantly reduce the overvoltage level, shorten the oscillation time, and reduce the voltage difference between the upper and lower DC bus capacitors. [ABSTRACT FROM AUTHOR]

With the increasing penetration level of electric vehicles (EVs) in distribution networks, the limited capacity of distribution networks has become a bottleneck for EV integration. Considering the difficulties of capacity expansion in distribution networks, especially in large cities, integrating EVs with photovoltaic (PV) generation systems and battery energy storage systems has become a possible technical solution for distribution networks. However, uncertainties in the PV generation systems and EV loads make planning and operating methods difficult for such systems. This paper presents an evaluation model that simulates the uncertainties of EV and PV power generation systems using a large number of stochastic scenarios generated by the Monte Carlo method to assess the revenue of various operators under multiple possible scenarios. Multiple operation constraints were considered in the proposed method, including voltage deviations, capacity limitation of the transformer, EV owner satisfaction, and other physical constraints. In order to accelerate the evaluation process of the EVs, the Distflow equations for distribution networks were applied in the proposed evaluation model. The results of case studies indicate that the maximum capacity of EVs with different scenarios can be calculated by the proposed model. [ABSTRACT FROM AUTHOR]

This paper presents a complete analysis of the electrical and dielectric characteristics of N i C o 2 O 4 (NCO) bulk ceramic synthesized by the co-precipitation process as a future electronic device material. The structural analysis following the synthesis process revealed the formation of cubic-phase spinel NCO in the shape of nanospheres, with an approximate diameter of 25 nm. The present study aimed to examine the relationship between capacitance and conductance for the NCO under investigation, focusing on their frequency and temperature dependencies. The frequency range of interest ranged from 100 Hz to 1.5 MHz, while the temperature range considered was from 300 K to 450 K. The C/f plot has exhibited the phenomenon of negative capacitance, which may be attributed to the augmentation of polarization and the incorporation of additional minority carriers inside the structure. The dielectric parameters, such as permittivity, dielectric loss, alternating current conductance, and electrical modulus, were determined by capacitance and conductance measurements, taking into account their frequency and temperature reliance. All dielectric calculations were influenced by negative capacitance measurements. The negative capacitance feature of N i C o 2 O 4 is attributed to the ferroelectric properties of the Ni and Co elements in its composition. In conclusion, this paper has made a valuable contribution to the existing body of literature by enhancing our comprehension of the negative capacitance behavior and dielectric characteristics of the NCO. [Display omitted] [ABSTRACT FROM AUTHOR]

This paper introduces an improved decentralized control strategy for a photovoltaic (PV) hybrid energy storage (HES) system (HESS) in a DC microgrid. The power sharing method of the HES system is discussed in depth. The basic principle of virtual resistance and capacitance droop (VRCD) control, which consists of virtual resistance droop (VRD) and virtual capacitance droop (VCD) control, is analyzed in detail to achieve the decoupling of the HES system for high-and low-frequency load power distribution. For the virtual capacitance control loop, the voltage compensator is added to achieve terminal voltage restoration of the supercapacitor (SC). For the virtual resistance control loop, in order to solve the problems of the unbalanced state of charge (SOC) of battery storage, a virtual resistance droop control based on a novel adaptive function is introduced. Finally, a model of the HESS in a DC microgrid is built in a real-time emulator to verify the effectiveness of the proposed control strategy. [ABSTRACT FROM AUTHOR]

A novel inductance simulation circuit employing only two dual‐output voltage‐differencing buffered amplifiers (DO‐VDBAs) and a single capacitance (grounded) is proposed in this paper. The reported configuration is a purely resistor‐less realization that provides electronically controllable realized inductance through biasing quantities of DO‐VDBAs and does not rely on any constraints related to matched values of parameters. This structure exhibits excellent behavior under the influence of tracking errors in DO‐VDBAs and does not exhibit instability at high frequencies. The simple and compact metal‐oxide semiconductor (MOS) implementation of the DO‐VDBAs (eight MOS per DO‐VDBA) and adoption of grounded capacitance make the proposed circuit suitable for on‐chip realization from the perspective of chip area consumption. The function of the pure grounded inductance is validated through high pass/bandpass filtering applications. To test the proposed design, simulations were performed in the PSPICE environment. Experimental validation was also conducted using the integrated circuit CA3080 and operational amplifier LF‐356. [ABSTRACT FROM AUTHOR]

Two-dimensional (2D) materials promise advances in electronic devices beyond Moore's scaling law through extended functionality, such as non-monotonic dependence of device parameters on input parameters. However, the robustness and performance of effects like negative differential resistance (NDR) and anti-ambipolar behavior have been limited in scale and robustness by relying on atomic defects and complex heterojunctions. In this paper, we introduce a novel device concept that utilizes the quantum capacitance of junctions between 2D materials and molecular layers. We realized a variable capacitance 2D molecular junction (vc2Dmj) diode through the scalable integration of graphene and single layers of stearic acid. The vc2Dmj exhibits NDR with a substantial peak-to-valley ratio even at room temperature and an active negative resistance region. The origin of this unique behavior was identified through thermoelectric measurements and ab initio calculations to be a hybridization effect between graphene and the molecular layer. The enhancement of device parameters through morphology optimization highlights the potential of our approach toward new functionalities that advance the landscape of future electronics. [ABSTRACT FROM AUTHOR]

Series multi‐break mechanical switch is one of the critical components of high‐voltage hybrid DC circuit breakers. However, due to the existence of distributed capacitance, the voltage distribution between the breaks is not balanced. This paper proposed a voltage sharing configuration method of the mechanical switch of hybrid DC circuit breaker, and carried out the static DC voltage and the transient voltage distribution characteristics tests to verify its effectiveness. Considering the influence of whole structure of the circuit breaker, this paper established the electrostatic field model and circuit simulation model of a typical ±535‐kV hybrid DC circuit breaker. And it analyzed the influence of single break's opening fault, breaking open distance, and the shielding fitting on the voltage distribution characteristics of series six break mechanical switch. According to the simulation results based on the Zhangbei voltage source converter‐based high‐voltage direct current project type test parameters, the parameters design of the voltage sharing components of the mechanical switch are obtained, which can meet the voltage sharing coefficient requirement of 95%. [ABSTRACT FROM AUTHOR]

The Potential Transformer (PT) plays an important role in the measurement and monitoring of the power system. The accurate modeling of the PT is very important but not yet perfect. The stray capacitance will have a non-negligible effect on the performance of a PT. However, the influence of stray capacitance is rarely considered in existing models, which makes the broadband simulation performance weak and provides limited references in engineering. In this paper, a calculation method of PT stray capacitance is proposed to analyze the performance of the PT at different frequencies and extract the capacitive current of the PT port. This paper used a non-destructive method to obtain the test data of a PT, calculated the value of the stray capacitance, and drew the hysteresis loops of the iron core. A corresponding simulation model was established to predict the PT performance at different frequencies. The simulation results are in good agreement with the experimental data, which proves the accuracy of the modeling parameters. The data processing logic is clear and is easy to be simplified by programming, which makes it promising in engineering. [ABSTRACT FROM AUTHOR]

This paper presents capacitor dimensioning to increase a system's power density while the converter performance for the delta-connected cascaded H-bridge (CHB) active power filter (APF) is not impaired. After comparing aluminum electrolytic capacitors with film capacitors, this paper proposes capacitance design requirements for film capacitors. With the help of trigonometric transformation for periodic time-varying variables, including capacitor voltages and branch voltages, the capacitance design requirements can be represented as positive univariate polynomials, the coefficients of which are with regard to the capacitance value. The optimization solver SeDuMi is then applied to determine whether a capacitance value is feasible by checking the positiveness of the polynomials. This research has very appealing theoretical and practical properties: the time-domain analysis capability for periodic variables is improved, therefore, enabling a fast computation and a broad application. Both the simulations and experimental results validate the proposed strategy. Compared with the previous work, the proposed method can result in a lower capacitance value without degrading the performance, which is beneficial for a low-cost and low-volume system. [ABSTRACT FROM AUTHOR]

In this paper, a multi-layered mushroom-type electromagnetic band gap (EBG) structure is proposed. A double layer two via EBG (DLTV EBG) structure is designed at 1.65 GHz. The proposed DLTV-EBG structure consists of a two-layer dielectric substrate, which reduces the lateral sizes due to a multilayer topology. By adjusting the patch dimensions and positions of the vias, the center frequency, and equivalent L and C parameters meet design requirements. In a DLTV-EBG, layer-1 has a square ring patch; layer-2 has a circular ring; outer square ring patch with 2 edged located vias gives the additional capacitance and inductance to achieve compactness. The simulation of the DLTV-EBG structure is carried out using the Ansys high-frequency structure simulator (HFSS) and experimentally validated. The band gap of the DLTV-EBG structure is measured using suspended microstrip line (SML) method. The Experimental results agree well with simulation one. The periodic size of the proposed DLTV-EBG structure is 0.05λ1.65 GHz, which is a good candidate where compact size is highly desired. [ABSTRACT FROM AUTHOR]

The nail penetration test has been widely adopted as a battery safety test for reproducing internal short-circuits. In this paper, the effects of cell initial State-of-Charge (SOC) and penetration location on variations in cell temperature and terminal voltage during penetration tests are investigated. Three different initial SOCs (10%, 50%, and 90%) and three different penetration locations (one is at the center of the cell, the other two are close to the edge of the cell) are used in the tests. Once the steel cone starts to penetrate the cell, the cell terminal voltage starts to drop due to the internal short-circuit. The penetration tests with higher initial cell SOCs have larger cell surface temperature increases during the tests. Also, the penetration location always has the highest temperature increment during all penetration tests, which means the heat source is always at the penetration location. The absolute temperature increment at the penetration location is always higher when the penetration is close to the edge of the cell, compared to when the penetration is at the center of the cell. The heat generated at the edges of the cell is more difficult to dissipate. Additionally, a battery cell internal short-circuit model with different penetration locations is built in ANSYS Fluent, based on the specifications and experimental data of the tested battery cells. The model is validated with an acceptable discrepancy range by using the experimental data. Simulated data shows that the temperature gradually reduces from penetration locations to their surroundings. The gradients of the temperature distributions are much larger closer to the penetration locations. Overall, this paper provides detailed information on the temperature and terminal voltage variations of a lithium-ion polymer battery cell with large capacity and high power under penetration tests. The presented information can be used for assessing the safety of the onboard battery pack of electric vehicles. [ABSTRACT FROM AUTHOR]

A capacitance multiplier is an active circuit designed specifically to increase the capacitance of a passive capacitor to a significantly higher capacitance level. In this paper, the use of a voltage differencing differential difference amplifier (VDDDA), an electronically controllable active device for designing grounded and floating capacitance multipliers, is proposed. The capacitance multipliers proposed in this study are extremely simple and consist of a VDDDA, a resistor, and a capacitor. The multiplication factor ( K c ) can be electronically controlled by adjusting the external bias current ( I B ). It offers an easy way of controlling it by utilizing a microcontroller for modern analog signal processing systems. The multiplication factor has the potential to be adjusted to a value that is either less than or greater than one, hence widening the variety of uses. The grounded capacitance multiplier can be easily transformed into a floating one by utilizing Zc-VDDDA. PSpice simulation and experimentation with a VDDDA realized from commercially available integrated circuits were used to test the performance of the proposed capacitance multipliers. The multiplication factor is electronically adjustable, ranging in approximation from 0.56 to 13.94. The operating frequency range is approximately three frequency decades. The realization of the lagging and leading phase shifters using the proposed capacitance multiplier is also examined and proven. The results reveal that the lagging and leading phase shifts are electronically tuned via the multiplication factor of the proposed capacitance multipliers. [ABSTRACT FROM AUTHOR]

This paper explores how water and water-based systems change their structure under different conditions, such as pH, temperature, and electric fields. These changes affect the properties and performance of living and non-living systems that use water or water-based systems in various technologies. We can use pH, temperature, and electric fields to measure and control the structural changes in water and water-based systems and improve the outcomes of different technologies in biology and medicine. More research is needed to understand how various factors influence the structure of water and water-based systems and how this affects living and non-living systems. [ABSTRACT FROM AUTHOR]

In the context of strong electromagnetic interference environments, the measurement accuracy of the capacitance parameters of transmission lines under power frequency measurement methods is not high. In this paper, a capacitance parameter anti-interference measurement method for transmission lines based on harmonic components is proposed to overcome the impact of power frequency interference. When applying this method, it is first necessary to open-circuit the end of the line under test. Subsequently, apply voltage to the head end of the tested line through a step-up transformer. Due to the saturation of the transformer during no-load conditions, a large number of harmonics are generated, primarily third harmonic. The third harmonic components of voltage and current on the tested transmission line are extracted using the Fourier transform. The proposed method addresses the influence of line distribution effects by establishing a distributed parameter model for long-distance transmission lines. The relevant transmission matrix for the zero-sequence distributed parameters is obtained by combining Laplace transform and similarity transform to solve the transmission line equations. Using synchronous measurement data from the third harmonic components of voltage and current at both ends of the transmission line, combined with the transmission matrix, this method accurately measures the zero-sequence capacitance parameters. The PSCAD/EMTDC simulation results and field test outcomes have demonstrated the feasibility and accuracy of the proposed method for measuring line capacitance parameters under strong electromagnetic interference. [ABSTRACT FROM AUTHOR]

This paper proposes an improved method to calculate the mutual capacitance between interdigital transducer (IDT) electrodes to enhance the accuracy of the traditional coupling-of-modes (COM) model, which is commonly used to simulate surface acoustic wave (SAW) filters and duplexers. In this method, the boundary element method (BEM) is adopted to obtain the capacitance per unit length in a layered medium, while the partial capacitance (PC) method is used to derive the effective relative permittivity of the multi-layered IDT. Numerical results from commercially available software are provided for comparison with the results calculated using the proposed method. The consistent results verify the validity and accuracy of this method, which also demonstrates significantly faster calculation speed compared to commercially available software. Precise electrical response prediction of a dual-mode SAW (DMS) filter can be achieved by applying this method to the COM model, and this ultra-fast calculation method can also be included in filter design optimization. [ABSTRACT FROM AUTHOR]

Liquid level detection system is an essential core functional component of automatic clinical medical testing instrument. The conventional liquid level detection method has low detection accuracy and sensitivity, and may have the problem of false detection, which may lead to the inaccurate test results. This paper presents a high sensitivity liquid level detection system based on the principle of variable capacitance. When the sampling probe contacts the liquid level, the probe capacitance will change. The liquid level detection circuit board judges whether the probe contacts the liquid level by sensing the change of probe capacitance. When judging the liquid level signal, the combination of slope detection and amplitude detection is used. The liquid level detection circuit board takes the phase-locked loop(PLL) circuit as the center to detect the change of the capacitance. The reference signal of the PLL is set as a square wave of 375kHz. The double tube probe is used as a part of the tuning capacitor of the voltage controlled oscillator to control the frequency of the output signal, which can realize the rapid phase locking. The experimental results show that the system has accurate detection results, high sensitivity, stable and reliable operation, good dynamic response performance in the case of large and small liquid volume. Compared with other liquid level detection methods based on machine vision, ultrasonic, optics and so on, the proposed liquid level detection system has simpler structure and lower cost, it can avoid the problems of collision, carryover contamination and empty suction by controlling the depth of sampling needle inserted into liquid. [ABSTRACT FROM AUTHOR]

In this paper, we propose a nonmonotone Alternative Direction Method (ADM) based on simple conic model for unconstrained optimization. Unlike traditional trust region method, the subproblem in our method is a simple conic model, where the Hessian of the objective function is replaced by a scalar approximation, the trust region subproblem is solved by ADM which was first proposed by Zhu and Ni. When the trial point isn't accepted by trust region, line search technique is used to find an acceptable point instead of resolving the trust region subproblem. The new method needs less memory capacitance and computational complexity. The global convergence of the algorithm is established under some mild conditions. Numerical results on a series of standard test problems are reported to show the new method is effective and robust. [ABSTRACT FROM AUTHOR]

The paper deals with the capacitance of cylindrical two-dimensional capacitor which consists of Cartesian orthotropic dielectric material. The determination of the capacitance of capacitor with orthotropic dielectric material by a suitable coordinate transformation is reduced to the computation of capacitance of an isotropic capacitor. It is proven that the capacitance of a Cartesian orthotropic capacitor can be obtained in terms of an isotropic capacitor whose dielectric constant is the geometric mean of the dielectric constant of the orthotropic capacitor. [ABSTRACT FROM AUTHOR]

A nonlinear capacitance compensation technique is presented in this paper to enhance the linearity of a power amplifier (PA) in the GaN process. The method involves placing an MSM varactor device alongside the GaN HEMT device, which works as the amplifying unit such that the overall capacitance observed at the amplifier input is constant, thus improving linearity. This approach is a reliable and straightforward way to improve PA linearity in the GaN process. The proof-of-concept prototype in this study involves the fabrication of a PA device using a standard GaN HEMT process, which successfully integrates the proposed compensation technique and demonstrates excellent compatibility with existing processes. The prototype has a saturation output power of 18 dBm, a peak power-added efficiency of 51.8%, and a small signal gain of 15.5 dB at 1 GHz. The measured AM–PM distortion at the 5 dB compression point is reduced by more than 50% compared to that of an uncompensated device. Furthermore, the results of third-order intermodulation distortion demonstrate the effectiveness of the linearity enhancement concept, with values improved by more than 5 dB in the linear region compared to those of the uncompensated device. All of the results demonstrate the potential utility of this design approach for wireless communication applications. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is a research hotspot in medium-voltage and high-voltage applications. The measurement offset error would cause an increase in the monitoring error of the submodule (SM) capacitance of the MMC, affecting the estimation accuracy of the SM capacitance monitoring. This paper proposes a capacitor monitoring strategy based on the offset error compensation, where two reasonable capacitor monitoring periods are selected in one fundamental period under the proposed voltage-balancing control (VBC) based on the virtual capacitor voltage (VCV) to compensate for the offset error impact on the capacitance monitoring. The proposed strategy can effectively eliminate the offset error impact on the capacitance monitoring, which ensures the accuracy of the SM capacitance monitoring in the MMCs. The effectiveness of the proposed monitoring strategy is confirmed by the simulations and experiments. [ABSTRACT FROM AUTHOR]

To enhance the power density of LLC resonant converters, multilayer planar inductors are required. However, multilayer planar inductors have high parasitic capacitance, which may cause inductor current ringing in LLC resonant converters, leading to EMI problems. In this paper, it is found that by using interleaved winding inductors, compared with traditional winding inductors, the parasitic capacitance of multilayer planar inductors is reduced, which can reduce current ringing, without sacrificing power density and increasing manufacturing complexity. The method used to analyze current ringing is to establish an impedance model, and the parasitic capacitance of the interleaved winding inductors is verified by FEM simulations. The analysis is validated in an LLC resonant converter prototype. [ABSTRACT FROM AUTHOR]

In this paper, a new negative lossless grounded capacitance multiplier (GCM) circuit based on a Current Feedback Operational Amplifier (CFOA) is presented. The proposed circuit includes a single CFOA, four resistors, and a grounded capacitor. In order to reduce the power consumption, the internal structure of the CFOA is realized with dynamic threshold-voltage MOSFET (DTMOS) transistors. The effects of parasitic components on the operating frequency range of the proposed circuit are investigated. The simulation results were obtained with the SPICE program using 0.13 µm IBM CMOS technology parameters. The total power consumption of the circuit was 1.6 mW. The functionality of the circuit is provided by the capacitance cancellation circuit. PVT (Process, Voltage, Temperature) analyses were performed to verify the robustness of the proposed circuit. An experimental study is provided to verify the operability of the proposed negative lossless GCM using commercially available integrated circuits (ICs). [ABSTRACT FROM AUTHOR]

In comparison to conventional EDM, micro EDM distinguishes itself through its brief discharge duration, narrow discharge channel radius, and concentrated energy density. However, there remains a paucity of comprehensive research on the surface formation characteristics in this domain. This paper delves into the formation mechanism of the recast layer in micro EDM workpieces, scrutinizing the primary factors that influence the formation process and the morphological attributes of the recast layer. We conducted a series of single-pulse experiments and micro EDM trials. Utilizing surface fitting tools, our experimental findings facilitated the derivation of a relational expression between the recast layer thickness of high-speed steel and the discharge parameters in micro EDM. Notably, when the energy is below 100 μJ, the recast layer thickness remains under 10 μm. Specifically, at an energy level of 16 μJ, opting for a smaller capacitance of 2200 pf and a higher voltage of 120 V in micro EDM results in a thinner recast layer. This study serves as a cornerstone for future efforts aimed at controlling and assessing the surface morphology of micro EDM. [ABSTRACT FROM AUTHOR]

In this paper, an inner ultrathin oxide metal–oxide–semiconductor (MOS) capacitor is fabricated with another outer MOS-gate ring as a coupling controller. Capacitance–voltage characteristics of inner MOS capacitor show that the excess minority carriers supplied from the outer MOS-gate ring can efficiently change the inner capacitance (${C} _{\text {inner}}$). It is observed that outer MOS-gate ring under the conditions at floating and at ground has quite different coupling effects on ${C} _{\text {inner}}$ when the inner MOS is biased at 1 V. Comparing to ${V} _{\text {outer}} = \text {floating}$ , ${C} _{\text {inner}}$ reduces significantly when ${V} _{\text {outer}} = {0}$ V at 1k Hz. The transient behavior of ${C} _{\text {inner}}$ as ${V} _{\text {outer}}$ changes from 0 V to floating is long enough to read, and the difference of two capacitance values can be regarded as two states. As a result, a two capacitance states operation is proposed for possible memory application. Based on the experimental results, the possible memory cell configuration is designed. Comparing to the present emerging memories, since the two states in this paper are in conditions of floating and 0 V, ultralow power is consumed, which is believed a promising concept for future memory application. [ABSTRACT FROM AUTHOR]

Traditional contact voltage measurement requires a direct electrical connection to the system, which is not easy to install and maintain. The voltage measurement based on the electric field coupling plate capacitance structure does not need to be in contact with the measured object or the ground, which can avoid the above problems. However, most of the existing flat-plate structure voltage measurement sensors are not only expensive to manufacture, but also bulky, and when the relative position between the wire under test and the sensor changes, it will bring great measurement errors, making it difficult to meet actual needs. Aiming to address the above problems, this paper proposes a multi-electrode array structure non-contact voltage sensor and signal processing algorithm. The sensor is manufactured by the PCB process, which effectively reduces the manufacturing cost and process difficulty. The experimental and simulation results show that, when the relative position of the wire and the sensor is offset by 10 mm in the 45° direction, the relative error of the traditional single-electrode voltage sensor is 17.62%, while the relative error of the multi-electrode voltage sensor designed in this paper is only 0.38%. In addition, the ratio error of the sensor under the condition of power frequency of 50 Hz is less than ±1% and the phase difference is less than 4°. The experimental results show that the sensor has good accuracy and linearity. [ABSTRACT FROM AUTHOR]

Lithium-ion batteries are widely used in the electric vehicle industry due to their recyclability and long life. However, a failure of lithium-ion batteries can cause some catastrophic accidents, such as electric car battery explosion fires and so on. To prevent such harm from occurring, it is essential to monitor the remaining useful life of lithium-ion batteries and give early warning. In this paper, an adaptive noise reduction approach is proposed to predict the RUL (Remaining Useful Life) of lithium-ion batteries, which uses CEEMDAN (Complete Ensemble Empirical Mode Decomposition with Adaptive Noise) combined with wavelet decomposition to achieve adaptive noise reduction decomposition, and then inputs the obtained IMF (Intrinsic Mode Function) components into LS–RVM (Least Square Relevance Vector Machine) for training, prediction, and reconstruction, so as to achieve high-precision prediction of RUL. Moreover, in order to verify the validity of the model, the model in this paper is compared with other common models. The results demonstrate that the RMSE, MAPE, and MAE of the proposed model are 0.008678, 0.005002, and 0.006894, and that it has higher accuracy than the other common prediction models. [ABSTRACT FROM AUTHOR]

Virtual synchronous generator (VSG)-based control approaches for AC machine drivers have attracted much attention in recent years. The contradiction between the strong motor loading capacity and the small DC voltage fluctuation is disregarded in previous studies. A larger virtual inertia is required to raise the torque gain and drive the motor with heavier loads, thus resulting in greater DC voltage variations. A systematic method is proposed for the optimal design of the virtual inertia for VSG-based motor starting systems to achieve the maximal motor loading capacity and the low DC voltage fluctuation in this paper. Firstly, the relationship between the virtual inertia and the loading capacity is revealed on the basis of the closed-loop analysis. Considering the DC voltage variation, the constraint on the maximal value of the virtual inertia is proposed from the energy-balance perspective despite the unknown contribution of the DC capacitors to the virtual inertia. To fully exploit the energy storage capacity of the DC capacitors and raise the upper limit of the virtual inertia under the same permitted DC voltage variation, a modified DC voltage reference is introduced. Extensive simulation and experimental results are presented to validate the effectiveness of the proposed methods. [ABSTRACT FROM AUTHOR]