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The subject of this project is the analysis and enabling of the RayBen code, which implements a finite difference scheme for the simulation of turbulent Rayleigh-Bénard convection in a closed cylindrical cell, for the Intel® Xeon Phi coprocessor architecture. After a brief introduction to the physical background of the code, the integration of Rayben into the benchmarking environment JuBE is discussed. The structure of the code is analysed through its call graph. The most performance-critical routines were identified. A detailed analysis of the OpenMP parallelization revealed several race conditions which were eliminated. The code was ported to the JUROPA cluster at the Jülich Supercomputing as well as to the EURORA cluster at CINECA. The performance of the code is discussed using the results of pure MPI and hybrid MPI/OpenMP benchmarks. It is shown that RayBen is a memory-intensive application that highly benefits from the MPI parallelization. The offloading mechanism for the Intel® MIC architecture lowers considerably the performance while the use of binaries that run exclusively on the coprocessor show a satisfactory performance and a scalability which is comparable to the CPU.

Work Package 7 ‘Enabling Petascale Applications: Efficient Use of Tier-0 Systems’ (WP7) ensures the effective exploitation of the PRACE Tier-0 systems by increasing scalability and performance of applications. While the focus in WP7 is primarily on enabling applications for Tier-0 systems, the tasks should also benefit applications performance on Tier-1 systems. Most of the activities had to commence on existing Tier-1 systems while waiting for the installation of the Tier-0 systems. Task 7.3 is called ‘Efficient Use of PRACE Systems’. Efficient use of the PRACE Tier-0 systems requires detailed knowledge of architecture-specific factors influencing performance, including compilers, tools and libraries. The main goal of this task is to investigate such issues, collect best practices on how to achieve good performance on the systems, and disseminate this knowledge to users. Topics for best practice guides include: optimal porting of applications (e.g. choice of numerical libraries and compiler options); architecture-specific optimisation and petascaling techniques; optimal system environment (e.g. tuneable system parameters, job placement and optimised system libraries); debuggers, performance analysis tools and programming environment. Task 7.3 covers two Tier-0 systems (JUGENE and Curie) and two common Tier-1 system families (Cray XE and IBM Power) with the potential to evolve in a Tier-0 system. Finally, since the four best practice guides comprise some 50 – 80 pages each, we decided not to include them as separate chapters in this report but to refer to the online versions on the PRACE RI web site instead.

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