332 results on '"Agarwal, Anant"'
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2. Widening Access to Applied Machine Learning with TinyML
3. Self-attention based BiLSTM-CNN classifier for the prediction of ischemic and non-ischemic cardiomyopathy
4. JFET Region Design Trade-Offs of 650 V 4H-SiC Planar Power MOSFETs
5. An Investigation of Body Diode Reliability in Commercial 1.2 kV SiC Power MOSFETs with Planar and Trench Structures
6. SiC Trench MOSFET with Depletion-Mode pMOS for Enhanced Short-Circuit Capability and Switching Performance
7. Modeling of Charge-to-Breakdown with an Electron Trapping Model for Analysis of Thermal Gate Oxide Failure Mechanism in SiC Power MOSFETs.
8. Geochemistry π: Automated Machine Learning Python Framework for Tabular Data.
9. Analyzing Multiprocessor Cache Behavior Through Data Reference Modeling
10. The MIT Alewife Machine: A Large-scale Distributed-memory Multiprocessor
11. An Efficient Virtual Network Interface in the Fugu Scalable Workstation
12. Maps: A Compiler-Managed Memory System for Software-Exposed Architectures
13. Multigrain Shared Memory
14. Dribble-Back Registers: A Technique for Latency Tolerance in Multiprocessors
15. Exploring Optimal Cost-Performance Designs for RAW processors
16. Quickstep: A System for Performance Monitoring and Debugging Parallel Applications on the Alewife Multiprocessor
17. How to Build Scalable On-Chip ILP Networks for a Decentralized Architecture
18. Memory Assignment for Multiprocessor Caches Through Graph Coloring
19. Closing the Window of Vulnerability in Multiphase Memory Transcations
20. An Evaluation of Multiprocessor Support for Fine-grain Synchronization in Preconditioned Conjugate Gradient
21. Virtual Wires: Overcoming Pin Limitations in FPGA-based Logic Emulators
22. Addressing Partitioned Arrays in Distributed Memory Multiprocessors - the Software Virtual Memory Approach
23. High-Performance All-Software Distributed Shared Memory
24. Communication-Minimal Partitioning of Parallel Loops and Data Arrays for Cache-Coherent Distributed -Memory Multiprocess
25. Anatomy of a Message in the Alewife Multiprocessor
26. Compile-time Techniques for Processor Allocation in Macro Dataflow Graphs for Multiprocessors
27. Global Partitioning of Parallel loops and Data Arrays for Caches and Distributed Memory in Multiprocessors
28. Performance Tradeoffs in Multithreaded Processors
29. Baring it all to Software: The Raw Machine
30. Experience with Fine-grain Synchronization in MIMD Machines for Preconditioned Conjugate Gradient
31. Virtual Wires: Overcoming Pin Limitations in FPGA-based Logic Emulation
32. Scalar Operand Networks: On-chip interconnect for ILP in Partitioned Architechures
33. Hierarchical Compilation of Macro Dataflow Graphs for Multiprocessors with Local Memory
34. Column-associative Caches: A Technique for Reducing the Miss Rate of Direct-mapped Caches
35. Integrating Message-passing and Shared-memory: Early Experience
36. Waiting Algorithms for Synchornization in Large-scale Multiprocessors
37. Maps: a Compiler-Managed Memory System for RAW Machines
38. FUGU: Implementing Translation and Protection in a Multiuser, Multimodel Multiprocessor
39. Automatic Partitioning of Parallel Loops for Cache-coherent Multiprocessors
40. Low-cost Support for Fine-grain Synchronization in Multiprocessors
41. A Study of Backoff Barrier Synchronization
42. The Sensitivity of Communication Mechanisms to Bandwidth and Latency
43. Closing the Window of Vulnerability in Multiphase memory transaction: The alewife transaction store
44. Software-Extended Coherent Shared Memory: Performance and Cost
45. Reactive Synchronization Algorithms for Multiprocessors
46. Modeling Multiprogrammed Caches
47. Integrated Shared-Memory and Message-Passing Communication in the Alewife Multiprocessor
48. Stream Algorithms and Architecture
49. Shared Memory Versus Message Passing for Iterative Solution of Sparse, Irregular Problems
50. Mechanisms and Interfaces for Software-Extended Coherent Shared Memory
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