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Part I of this paper discussed the design of a four-terminal skewed straintronic magnetotunneling junction (ss-MTJ) switch, and its adaptation to a non-Boolean “one transistor, one trench capacitor, and one ss-MTJ” ternary content-addressable memory (TCAM) cell. This part of the paper discusses a TCAM array based on ss-MTJ-TCAM cells and the associated peripherals for search operation. We show that non-Boolean associative processing of the ss-MTJ-TCAM cells enhances energy-efficiency and performance of an ss-MTJ-based TCAM array. The energy-delay-product (EDP) of ss-MTJ-based TCAM is compared against CMOS-based TCAM for a $144\times256$ array. The minimum EDP in ss-MTJ-based TCAM is $\sim 10.8\times $ lower than the minimum EDP in CMOS-based TCAM. Additionally, the operational frequency at which the ss-MTJ-based design shows the minimum EDP is $\sim 9.4\times $ higher than the respective frequency in the CMOS-based design. We also compare ss-MTJ-based TCAM against other state-of-the-art MTJ-based TCAMs. The comparison shows that the ss-MTJ-based TCAM also outperforms MTJ-based TCAMs in cell density, search delay, and search energy. Finally, we discuss implications of process variability in ss-MTJ to TCAM implementation and identify critical design parameters in ss-MTJ-based TCAM to enhance its robustness and area/ energy-efficiency. [ABSTRACT FROM PUBLISHER]

This paper presents a ternary content-addressable memory (TCAM) cell based on a skewed straintronic magnetotunneling junction (MTJ) switch. A straintronic magnetotunneling junction (s-MTJ) is a three-terminal switch, where the resistance between two of the terminals switches when a potential is applied to the third (gate) terminal that induces strain in the magnetostrictive free-layer. An s-MTJ is a highly energy-efficient switch that would dissipate only ~aJ of energy during switching. This paper discusses a novel variant of s-MTJ, namely skewed s-MTJ (ss-MTJ), where the MTJ switching can be controlled by two gate terminals. The current through an ss-MTJ is minimum when the potentials at the first and second gate terminals ( V2 and V3 , respectively) obey the relation V3 = V2+VF . Here, VF is a fixed voltage (“offset voltage”). Current in an ss-MTJ increases steeply when V2 and V3 deviate from the above “match” condition. This unconventional I – V characteristic of an ss-MTJ is exploited to design a non-Boolean TCAM cell based on just one transistor, one trench capacitor, and one ss-MTJ. We also discuss search and write operations in the ss-MTJ-TCAM cell, and show that the cell requires very small voltages to operate because of the unique I – V characteristics of the ss-MTJ. [ABSTRACT FROM PUBLISHER]

Modulation of stress anisotropy of magnetostrictive nanomagnets with strain offers an extremely energy-efficient method of magnetization reversal. The reversal process, however, is often incoherent and hence, error-prone in the presence of thermal noise at room temperature. Occurrence of incoherent metastable states in the potential landscape of the nanomagnet can further exacerbate the error. Stochastic micromagnetic simulations at room temperature are used to understand and calculate energy dissipations and switching error probabilities in this important magnetization switching methodology. We find that these quantities have an intriguing dependence on nanomagnet size. Small nanomagnets perform better owing to the fact that they are more resilient to the formation of metastable states and magnetization dynamics in them is more coherent. However, for a fixed stress anisotropy energy density, smaller nanomagnets will also have poorer resilience against thermal instability. Thus, the challenge in straintronics is to maximize the stress anisotropy energy density by developing materials and processes that yield the largest magnetostriction. [ABSTRACT FROM PUBLISHER]

Strain-clocked dipole-coupled nanomagnetic logic (DC-NML) is an energy-efficient Boolean logic paradigm whose progress has been stymied by its propensity for high error rates. In an effort to mitigate this problem, we have studied the effect of nanomagnet geometry on error rates, focusing on elliptical and cylindrical geometries. We had previously reported that in elliptical nanomagnets, the out-of-plane excursion of the magnetization vector during switching creates a precessional torque that plays a dual role—it speeds up the switching, but is also responsible for the high switching error probability. The absence of this torque in cylindrical magnets should lower error rates, but our simulations show that the error rate actually does not improve significantly compared with elliptical magnets while the switching becomes unacceptably slow. Here, we show that DC-NML employing elliptical nanomagnets can offer relatively high reliability for NML (switching error probability < 10^-8 ), moderate clock speed ( $\sim 100$ MHz), and two to three orders of magnitude energy saving compared with CMOS devices, provided the shape anisotropy energy barrier of the nanomagnet is increased to at least $\sim 5.5$ eV to allow engineering a stronger dipole coupling between neighboring nanomagnets. [ABSTRACT FROM AUTHOR]

Hardware-based image processing offers speed and convenience not found in software-centric approaches. Here, we show theoretically that a 2-D periodic array of dipole-coupled elliptical nanomagnets, delineated on a piezoelectric substrate, can act as a dynamical system for specific image processing functions. Each nanomagnet has two stable magnetization states that encode pixel color (black or white). An image containing black and white pixels is first converted to voltage states and then mapped into the magnetization states of a nanomagnet array with magneto-tunneling junctions (MTJs). The same MTJs are employed to read out the processed pixel colors later. Dipole interaction between the nanomagnets implements specific image processing tasks, such as noise reduction and edge enhancement detection. These functions are triggered by applying a global strain to the nanomagnets with a voltage dropped across the piezoelectric substrate. An image containing an arbitrary number of black and white pixels can be processed in few nanoseconds with very low energy cost. [ABSTRACT FROM AUTHOR]