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1. Simulation-based Analysis of a Novel Loop-based Road Topology for Autonomous Vehicles

Author

Ramdhan, Stefan, Trandinh, Winnie, Arulmohan, Sathurshan, Hu, Xiayong, Deevy, Spencer, Bandur, Victor, Pantelic, Vera, Lawford, Mark, and Wassyng, Alan

Subjects
Computer Science - Robotics, Electrical Engineering and Systems Science - Systems and Control
Abstract

The challenges in implementing SAE Level 4/5 autonomous vehicles are manifold, with intersection navigation being a pervasive one. We analyze a novel road topology invented by a co-author of this paper, Xiayong Hu. The topology eliminates the need for traditional traffic control and cross-traffic at intersections, potentially improving the safety of autonomous driving systems. The topology, herein called the Zonal Road Topology, consists of unidirectional loops of road with traffic flowing either clockwise or counter-clockwise. Adjacent loops are directionally aligned with one another, allowing vehicles to transfer from one loop to another through a simple lane change. To evaluate the Zonal Road Topology, a one km2 pilot-track near Changshu, China is currently being set aside for testing. In parallel, traffic simulations are being performed. To this end, we conduct a simulation-based comparison between the Zonal Road Topology and a traditional road topology for a generic Electric Vehicle (EV) using the Simulation for Urban MObility (SUMO) platform and MATLAB/Simulink. We analyze the topologies in terms of their travel efficiency, safety, energy usage, and capacity. Drive time, number of halts, progress rate, and other metrics are analyzed across varied traffic levels to investigate the advantages and disadvantages of the Zonal Road Topology. Our results indicate that vehicles on the Zonal Road Topology have a lower, more consistent drive time with greater traffic throughput, while using less energy on average. These results become more prominent at higher traffic densities., Comment: 8 pages, 10 figures, Submitted to IV2024

Published
2024

2. Unifying theories of logics with undefinedness

Author

Bandur, Victor and Woodcock, Jim

Subjects
005.1
Abstract

A relational approach to the question of how different logics relate formally is described. We consider three three-valued logics, as well as classical and semi-classical logic. A fundamental representation of three-valued predicates is developed in the Unifying Theories of Programming (UTP) framework of Hoare and He. On this foundation, the five logics are encoded semantically as UTP theories. Several fundamental relationships are revealed using theory linking mechanisms, which corroborate results found in the literature, and which have direct applicability to the sound mixing of logics in order to prove facts. The initial development of the fundamental three-valued predicate model, on which the theories are based, is then applied to the novel systems-of-systems specification language CML, in order to reveal proof obligations which bridge a gap that exists between the semantics of CML and the existing semantics of one of its sub-languages, VDM. Finally, a detailed account is given of an envisioned model theory for our proposed structuring, which aims to lift the sentences of the five logics encoded to the second order, allowing them to range over elements of existing UTP theories of computation, such as designs and CSP processes. We explain how this would form a complete treatment of logic interplay that is expressed entirely inside UTP.

Published
2014

3. Using Assurance Cases to Prevent Malicious Behaviour from Targeting Safety Vulnerabilities

Author

Bandur, Victor, Lawford, Mark, Mosser, Sébastien, Paige, Richard, Pantelic, Vera, Wassyng, Alan, and Computing and Software

Subjects
safety critical, malicious attack, assurance case
Abstract

We discuss an approach to modifying a safety assurance case to take into account malicious intent. We show how to analyze an existing assurance case to reveal additions and modifications that need to be made in order to deal with the effects of malicious intent aimed at safety critical applications, and where to make them.

Published
2023

5. INTO-CPS tool chain user manual

Author

Bandur, Victor, Larsen, Peter Gorm, Lausdahl, Kenneth, Thule, Casper, Gamble, Carl, Payne, Richard, Pop, Adrian, Brosse, Etienne, Brauer, Jörg, Lapschies, Florian, Groothuis, Marcel, Bokhove, Tom, Kleijn, Christian, and Couto, Luis Diogo

Published
2017

6. Code-generating VDM for Embedded Devices

Author

Bandur, Victor, Tran-Jørgensen, Peter Würtz Vinther, Hasanagic, Miran, Lausdahl, Kenneth Guldbrandt, Fitzgerald, J, Tran-Jørgensen, P.W.V., and Oda, T.

Published
2017

7. Hard Real-Time Microcontroller Code Generation from Timed Automaton Specifications

Author

Bandur, Victor, Kahl, Wolfram, Wassyng, Alan, and Software Engineering

Abstract

Title: Hard Real-Time Microcontroller Code Generation from Timed Automaton Specifications, Author: Victor Bandur, Location: Thode A method is developed for automatically synthesizing hard real-time assembly code for simple microcontrollers directly from timed automaton software specifications. The method uses the microcontrollers' individual instruction execution times to approximate as closely as possible the timing requirements indicated in the specification. In order to accommodate this approximation, certain transitions in the specification automaton require tolerances on timing constraints to be provided as part of the specification. A second automaton is produced that is a model of the behaviour of the implementation. The method is applied to the synthesis of a software metronome device for the Microchip PIC 18F452 microcontroller. Thesis Bachelor of Engineering (BEng)

Published
2008

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