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After many years of developments, 3D Integrated Circuits have emerged as a potential key enabler for maintaining semiconductor performance trends. Through Silicon Vias (TSVs) sit at the foundation of the 3D-IC revolution for extending semiconductor integration into a new phase. Integrated device manufacturers and fabless design houses need small, high-density, fine-pitch vias for improving signal integrity and Si real-estate savings, without possibility to wait for very thin wafer processing and handling technologies to become a mainstream. Deep TSVs with Aspect Ratio (AR) greater than 10:1 elegantly fulfill those requirements. But they cannot be manufactured with acceptable yield/cost using traditional dry processes for liner, barrier and seed deposition. Conventional dry techniques show basic shortcomings and impose high capital investments. Beyond that, physical limitations of directional dry techniques prevent the deposited layer from reaching good step coverage or even continuity inside the vias, which is required to perform void-free gap filling with electroplated copper. To overcome those limitations, alternative wet solutions based on electrografting (eG) and chemical grafting (cG) technologies were developed. These latter are two fundamental molecular engineering technologies, delivering high-quality films (continuous, adherent and uniform) for high aspect ratio (HAR) TSVs. This paper will focus on the integration of eG copper seed as a mature solution for TSVs with HAR, to overcome PVD Copper limitations in those dimensions. Electrografting is based on surface chemistry formulations and processes. It is applied to conductive and semi-conductive surfaces, and enables self-oriented growth of thin coatings of various materials, initiated by in-situ chemical reactions between specific precursor molecules and the surface. Contrary to electro-deposition which requires a potential supply throughout deposition to fuel the redox processes, electrografting is an electro-initiated process which requires a charged electrode only for the grafting step, but not for the thickening. As eG is mainly a cathodic process, it can generally be applied to various metallic and semiconducting surfaces without any concern over oxide formation. In a first approach, electrografting was used for polymer deposition on various conductive and semi conductive substrates. In this case, the grafting occurs via a direct electron transfer from the cathode to the electro-active monomers in solution (Figure 1). Mechanisms of radical polymerization show that polymer electrografting is an electro-induced grafting process followed by a purely chemical propagation step (polymerization). The first electro-induced step is crucial to form the chemical bond between the polymer and the surface. A specific organic precursor (B) is used both to form a first primer grafted layer and to initiate the polymerization of the vinyl monomer (A) in solution. The termination step of the polymerization leads to the grafting of macromolecular chains (-[A-A-A]n-B) onto the first primer grafted layer. Based on the polymer electrografting concept, formulation and processes have been developed to graft metal layers onto various type of conductive and semi-conductive surfaces. In opposite, for instance, to copper electrodeposition which has to be performed on conductive layer to avoid terminal effect induced by resistive copper diffusion barrier layers, copper electrografting technology can interestingly be achieved on highly resistive substrates. A bath containing specific organics and copper has previously been developed to deposit the Cu seed layer. It has been shown that electrografted copper seed can directly be applied to various dry-deposited diffusion barriers (Ta, TaN, Ti, TiN, TiW) without any adhesion promoter in between. This paper deals with the integration of eG Seed layer on a conformal MoCVD TiN copper diffusion barrier on 8:1 aspect ratio TSVs. First, detailed mechanism of the electrografting process will be discussed. Secondly, the influence of the electrical barrier resistivity (PVD TiN, Ni vs MoCVD TiN) on the plating properties into the via will be presented for both experiments done at coupon level and up scaled in an industrial 300mm diameter wafer reactor. Plating differences will be considered in term of growth initiation and step coverage for these two experimental configurations. Fine tuning of the process parameters at the 300mm scale will then be examined to achieve a conformal, uniform and adherent copper seed layer in order to successfully respond to the high AR copper filling challenge in the TSV applications. Finally, void-free filling, integration in a conventional 3D process flow and electrical characterizations on high aspect ratio TSV middle daisy chains are ongoing. As a perspective to decrease the cost of TSV metallization, the entire wet metallization process flow including isolation, copper diffusion barrier, copper seed and copper fill steps will be developed at the end of this paper.