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The four-axis variable trajectory equal-thickness screen (FAVTETS) achieves equal-thickness screening by appropriate excitation force generated by four eccentric rotors in synchronized motion. The forced synchronization exciter is characterized by an unsatisfactory synchronization effect due to the wear of transmission parts. Hence, in this paper, the four-axis controlled synchronization of FAVTETS is investigated, and an intelligent control system is proposed. Firstly, research is conducted on the variable trajectory characteristics of FAVTETS. Next, the sliding mode, fuzzy, and PID controllers are designed and compared to obtain an ideal control effect. Moreover, the influence of torsional stiffness of flexible coupling on control accuracy is considered. The results show that the sliding mode controller has a good control effect. Based on the aforementioned, the simulation model of a four-axis controlled synchronization structure is established via MATLAB/Simulink. Finally, Labview is employed to design the four-axis controlled synchronization software system. Then, the physical experiment is carried out. The four-axis controlled synchronization and vibration trajectory measurement results verify the effectiveness and robustness of the intelligent control system. [ABSTRACT FROM AUTHOR]

Background: Lung perfusion using 99mTc-macroaggregated albumin single-photon emission computed tomography (SPECT) and lung computed tomography (CT) is a useful modality for identifying patients with pulmonary artery embolism. However, conformity between SPECT and CT at the bottom of the lung is generally low. This study aims to investigate the progression of conformity between lung perfusion SPECT and lung CT using a breathing synchronization software. Methods: Among 95 consecutive patients who underwent lung perfusion SPECT and lung CT within 14 days because of suspected pulmonary embolism between June 2019 and August 2020 in department of cardiovascular medicine, we identified 28 patients (73 ± 10 years) who had normal pulmonary artery on contrast lung CT. We compared lung volumes calculated using lung perfusion SPECT and lung CT as gold standard. Visual conformity between lung SPECT and lung CT was scored 0–4 (0: 0–25%, 1: 25–50%, 2: 50–75%, 3: 75–90%, 4: > 90%) by two specialists in nuclear medicine and assessed. Results: The lung volume calculated from lung CT was 3749 ± 788 ml. The lung volume calculated from lung perfusion SPECT without using the breathing synchronization software was 3091 ± 610 ml. There was a significant difference between the lung volume calculated from CT and SPECT without using the breathing synchronization software (P < 0.01). The lung volume calculated from lung perfusion SPECT using the breathing synchronization software was 3435 ± 686 ml, and there was no significant difference between the lung volume calculated from CT and SPECT using the breathing synchronization software. The visual score improved with the use of breathing synchronization software (without software; 1.9 ± 0.6 vs. with software; 3.4 ± 0.7, P < 0.001). Conclusion: This study demonstrated that the breathing synchronization software could improve conformity between lung perfusion SPECT and lung CT. [ABSTRACT FROM AUTHOR]

This paper reveals the hidden dangers of reverse data modifications on distributed software with network synchronization, during the era of 5G, which may occur in more important domains, such as telemedicine and automatic driving. We used pseudo-codes to formally elaborate the distributed software architectures and design patterns. It is necessary to deal with three challenges for the modification of binary code and data in the distributed software architectures: (1) the base virtual addresses of software objects are changed frequently for safety; (2) prior knowledge of the reverse is not considered; (3) system memory values of some target objects are changed with extreme speed. For this purpose, a novel reverse modification method for binary code and data is proposed. According to the knowledge-based rules, our method can manipulate physical data, sight data, animation data, etc., while the game synchronization mechanism cannot detect the changes. The implementation details of our method are presented using high-level programming languages (C++) and low-level programming languages (assembly), based on multiple snippets, so that readers can understand both the overall distributed software developments and the corresponding reverse processes. In particular, two network games are used for the demonstrations in this paper. The demonstration results show that our proposed methodology is efficient (as proved by formulas and practices) to manipulate the codes and data of distributed software using a synchronization mechanism. [ABSTRACT FROM AUTHOR]

Automatic operations of multi-functional and time-lapse live-cell imaging are necessary for the biomedical science community to study active, multi-faceted, and long-term biological phenomena. To achieve automatic control, most existing solutions often require the purchase of extra software programs and hardware that rely on the manufacturers' own specifications. However, these software programs are usually non-user-programmable and unaffordable for many laboratories. To address this unmet need, we have developed a novel open-source software program, titled Automatic Multi-functional Integration Program (AMFIP), as a new Java-based and hardware-independent system that provides proven advantages over existing alternatives to the scientific community. Without extra hardware, AMFIP enables the functional synchronization of the μManager software platform, the Nikon NIS-Elements platform, and other 3rd party software to achieve automatic operations of most commercially available microscopy systems, including but not limited to those from Nikon. AMFIP provides a user-friendly and programmable graphical user interface (GUI), opening the door to expanding the customizability for myriad hardware and software systems according to user-specific experimental requirements and environments. To validate the intended purposes of developing AMFIP, we applied it to elucidate the question whether single cells, prior to their full spreading, can sense and respond to a soft solid substrate, and if so, how does the interaction depend on the cell spreading time and the stiffness of the substrate. Using a CRISPR/Cas9-engineered human epithelial Beas2B (B2B) cell line that expresses mNeonGreen2-tagged mechanosensitive Yes-associated protein (YAP), we show that single B2B cells develop distinct substrate-stiffness-dependent YAP expressions within 10 hours at most on the substrate, suggesting that cells are able to sense, distinguish, and respond to mechanical cues prior to the establishment of full cell spreading. In summary, AMFIP provides a reliable, open-source, and cost-free solution that has the validated long-term utility to satisfy the need of automatic imaging operations in the scientific community. [ABSTRACT FROM AUTHOR]

Enabling technologies that drive Industry 4.0 and smart factories are pushing in new equipment and system development also to prevent human workers from repetitive and non-ergonomic tasks inside manufacturing plants. One of these tasks is the order-picking which consists in collecting parts from the warehouse and distributing them among the workstations and vice-versa. That task can be completely performed by a Mobile Manipulator that is composed by an industrial manipulator assembled on a Mobile Robot. Although the Mobile Manipulators implementation brings advantages to industrial applications, they are still not widely used due to the lack of dedicated standards on control and safety. Furthermore, there are few integrated solutions and no specific or reference point allowing the safe integration of mobile robots and cobots (already owned by company). This work faces the integration of a generic mobile robot and collaborative robot selected from an identified set of both systems. The paper presents a safe and flexible mechatronic interface developed by using MBSE principles, multi-domain modeling, and adopting preliminary assumptions on the hardware and software synchronization level of both involved systems. The interface enables the re-using of owned robot systems differently from their native tasks. Furthermore, it provides an additional and redundant safety level by enabling power and force limiting both during cobot positioning and control system faulting. [ABSTRACT FROM AUTHOR]

Providing group study rooms is an important service offered by a university library to support learning and collaboration. A good room booking system should be convenient for students to use and would require a minimum involvement of library staff regarding managing bookings and keys. This article studied the implementation of the Juno Secure Room Booking system at the library to replace LibCal, which is a popular room booking system used by a large number of university libraries in North America. This article discussed the advantages that the Juno system has compared to LibCal, the design of an online booking website using the Juno Application Programming Interface (API), and the enhancement the library designed and developed based on student feedback. This article also discussed how the library successfully engaged a college to use this system to manage study rooms for classes and exams. [ABSTRACT FROM AUTHOR]

IoT wearable devices that leverage the LPWAN (Low Power Wide Area Network) connectivity, in particular the NB-IoT (Narrow Band IoT) technology, commonly rely on UDP (User Datagram Protocol) packets to communicate with the endpoint to collect data. Its advantage is that of minimal bandwidth usage but its drawback is the lack of acknowledgements by the endpoint. One option is to use TCP (Transmission Control Protocol) or implement a custom acknowledgement protocol at a superior level in the network stack. This paper presents the implementation and testing of a simple and lightweight software synchronization layer on top of the UDP protocol, for the transmission of live EKG signal data, with verification of data integrity and the detection of sampling points loss. [ABSTRACT FROM AUTHOR]

The latest research in Spain indicates that the most advanced neuromarketing consulting companies in the sector are those that have been able to innovate in the development of their own technologies and methodologies. Despite their reduced volume of business compared to total investment in marketing and market research in our country, there are signs that suggest these companies have great potential to improve this sector, which is still to be explored. For this reason, this research straddling the ethnographic method and the theoretical–descriptive method aims to help us better understand the characteristic features of this sector by actively listening to the professional voices that lead it. Its epistemological value lies in its contribution to understanding the business culture related to the professional development of neuromarketing in our country today. The study shows that the main human resources strategy of neuromarketing consulting companies is based on the creation of multidisciplinary work teams. In addition, most of them develop data analysis software, which they can safeguard under various types of copyright, and on other occasions they manage to patent them, to later apply them to the objectives and purposes of their company. This would also explain the widespread use of certain procedures and resources by the vast majority of the consulting companies investigated. Thus, the trend in the market is the implementation of different synchronization software to the available technological and methodological resources. Others have even gone so far as to create a new technological support to incorporate methodologies already in use. Therefore, this gives them exclusivity in their services and the necessary competitive advantage over their competitors. Among other factors, these inferences about how this sector really works are very likely to be very useful in the academic field, which will constitute a further step in generating critical thinking and in expanding the frontiers of knowledge around this discipline. [ABSTRACT FROM AUTHOR]

Concurrency bugs widely exist and severely threaten system availability. Techniques that help recover from concurrency-bug failures during production runs are highly desired. This paper proposes BugTM, an approach that applies transactional memory techniques for concurrency-bug recovery in production runs. Requiring no knowledge about where are concurrency bugs, BugTM uses static analysis and code transformation to enable BugTM-transformed software to recover from a concurrency-bug failure by rolling back and re-executing the recent history of a failure thread. BugTM is instantiated as three schemes that have different trade-offs in performance and recovery capability: BugTM$_H$H uses existing hardware transactional memory (HTM) support, BugTM$_S$S leverages software transactional memory techniques, and BugTM$_{\mathrm{HS}}$ HS is a software-hardware hybrid design. BugTM greatly improves the recovery capability of state-of-the-art techniques with low run-time overhead and no changes to OS or hardware, while guarantees not to introduce new bugs. [ABSTRACT FROM AUTHOR]

This paper proposes novel randomized gossip-consensus-based sync (RGCS) algorithms to realize efficient time calibration in dynamic wireless sensor networks (WSNs). First, the unreliable links are described by stochastic connections, reflecting the characteristic of changing connectivity gleaned from dynamic WSNs. Secondly, based on the mutual drift estimation, each pair of activated nodes fully adjusts clock rate and offset to achieve network-wide time synchronization by drawing upon the gossip consensus approach. The converge-to-max criterion is introduced to achieve a much faster convergence speed. The theoretical results on the probabilistic synchronization performance of the RGCS are presented. Thirdly, a Revised-RGCS is developed to counteract the negative impact of bounded delays, because the uncertain delays are always present in practice and would lead to a large deterioration of algorithm performances. Finally, extensive simulations are performed on the MATLAB and OMNeT++ platform for performance evaluation. Simulation results demonstrate that the proposed algorithms are not only efficient for synchronization issues required for dynamic topology changes but also give a better performance in terms of converging speed, collision rate, and the robustness of resisting delay, and outperform other existing protocols. [ABSTRACT FROM AUTHOR]

Pipelining allows the execution of loop iterations with cross-iteration dependences to overlap in time, provided that the loop body is partitioned into stages such that the data dependences are not violated. Then, the stages are mapped onto threads and communication and synchronization between stages is typically achieved using queues. Pipelining techniques that rely on static scheduling perform poorly for load-imbalanced loops. Moreover, previous research efforts that achieve load-balancing are restricted to work-stealing and imply high overhead for fine-grained loops. In this article, we present URTS, a unified runtime system with compiler support that provides a lightweight dynamic scheduler by combining mapping, communication and synchronization algorithms with a suitable data structure and an efficient ticket mechanism. Particularly, URTS shows that it is possible to combine the efficiency of static scheduling with the load-imbalance tolerance of work-stealing by using a unified design that exploits the properties of a novel data structure. The evaluation on 8- and 32-core machines shows that URTS implies low overhead, of the same order as a static scheduler, for a set of benchmarks chosen from widely-used collections. URTS is a scalable solution that performs efficient dynamic scheduling for fine-grained loops, i.e., a class of interesting loops that is poorly handled by the state-of-the-art due to high overhead. [ABSTRACT FROM AUTHOR]

Highlights • Synchronization in SO(3) and SE(3) is formulated as a low-rank and sparse matrix decomposition problem. • Any low-rank and sparse matrix decomposition algorithm can be used in this framework. • Good trade-off between resistance to outliers and speed. Abstract This paper deals with the synchronization problem, which arises in multiple 3D point-set registration and in structure-from-motion. The problem is formulated as a low-rank and sparse matrix decomposition that caters for missing data, outliers and noise, and it benefits from a wealth of available decomposition algorithms that can be plugged-in. A minimization strategy, dubbed R-GoDec , is also proposed. Experimental results on simulated and real data show that this approach offers a good trade-off between resistance to outliers and speed. [ABSTRACT FROM AUTHOR]

Hardware Transaction Memory (HTM) opens a new way to scaling multi-core software. Its main target is to achieve high performance on multi-core systems, and at the same time simplify concurrency control and guarantee correctness. This paper presents the redesign of an existing concurrent hash table using several HTM-based synchronization mechanisms. As compared with a fine-grained lock implementation, HTM-based locking scales well on our testing platform, and its performance is higher when running large-scale workloads. In addition, HTM-based global locking consumes much less memory. In summary, several observations are made in this paper with detailed experimental analysis, which would have important implications for future research of concurrent data structures and HTM. [ABSTRACT FROM AUTHOR]

Heterogeneous systems with CPU and GPGPU sharing the last level cache (LLC) provide viability and flexibility. However, the different programming models lead to conflicting memory layouts, which are required for best performance of different processors. Software converting that directly accesses target layout is subject to sub-optimal localities. Converting in GPGPU shared memory also incurs copying and synchronization overhead. In this paper, we analyze the memory layout requirement and propose to remap the memory layout in the shared LLC. A remap controller in LLC executes a simple program that calculates target requests from an LLC request in the source memory space. The LLC request is thus remapped to the target memory space with the generated requests. Consequently, all processors always access memory in their optimal data layouts. The locality is thus kept through all the private caches, and software remapping overhead is also eliminated. The tiled-matrix multiplication is discussed as a case study and benchmarks from Polybench/GPU and Rodinia are modified to take advantage of the LLC layout remapping. The experiment results show the average benchmark execution time is decreased to 69%. Compared with CPU software layout converting, the CPU time is decreased to 41%–73%. [ABSTRACT FROM AUTHOR]

In the distributed test architecture, the system under test (SUT) interacts with its environment at multiple physically distributed ports and the local testers at these ports do not synchronize their actions. This presents many challenges and, in particular, apparently incorrect behaviors can be the consequence of an erroneous assumption about the exact order in which actions were performed at different ports. In previous work, we defined a conformance relation for the distributed test architecture. Essentially, the SUT is faulty if we observe a trace $\sigma$ such that no admissible reordering of the actions in $\sigma$ could have been produced by the specification. However, this notion can be weak if the compared traces might be too different. This paper introduces conformance relations where, for a given metric, a reordering is only considered if the distance between the two traces is at most a certain bound $k$. We introduce two different metrics and provide algorithms to construct finite automata accepting these close, with respect to each metric, sequences. We also study the computational complexity of the two main problems associated with the new framework: deciding whether a trace is accepted by the new automaton and deciding whether one system conforms to a specification with respect to the new conformance relation. [ABSTRACT FROM AUTHOR]

A delay of less than one millisecond is required by low-latency 5G wireless communication systems for supporting the “tactile” Internet. Hence, conventional initial synchronisation cannot be readily employed because of its potentially excessive delay. In this paper, an extrinsic information transfer (EXIT) chart assisted approach is used for the convergence analysis of $m$-sequences using recursive soft sequence estimation (RSSE) in the context of Nakagami-m fading channels. Explicitly, the novelty of our work is based on employing a new type of EXIT charts operating without using interleavers. This is a challenge, because the original EXIT charts rely on the employment of long, high-delay interleavers for ensuring that the inputs to the decoders become uncorrelated. We then evaluate the performance of various classes of $m$-sequences with the aid of the proposed EXIT charts and demonstrate that the $m$-sequences generated by the lower order polynomials maximize the mutual information more promptly with the aid of our RSSE scheme than those that belong to a higher order polynomial. [ABSTRACT FROM PUBLISHER]

This paper addresses the viability of using Automatic Speech Recognition (ASR) errors as the predictor of difficulties in speech segments, thereby exploiting them to improve Partial and Synchronized Caption (PSC), which we have proposed to train second language (L2) listening skill by encouraging listening over reading. The system uses ASR technology to make word-level text-to-speech synchronization and generates a partial caption. The baseline system determines difficult words based on three features: speech rate, word frequency and specificity. While it encompasses most of the difficult words, it does not cover a wide range of features that hinder L2 listening. Therefore, we propose the use of ASR systems as a model of L2 listeners and hypothesize that ASR errors can predict challenging speech segments for these learners. Among different cases of ASR errors, annotation results suggest the usefulness of four categories of homophones, minimal pairs, negatives, and breached boundaries for L2 listeners. A preliminary experiment with L2 learners focusing on these four categories of the ASR errors revealed that these cases highlight the problematic speech regions for L2 listeners. Based on the findings, the PSC system is enhanced to incorporate these kinds of useful ASR errors. An experiment with L2 learners demonstrated that the enhanced version of PSC is not only preferable, but also more helpful to facilitate the L2 listening process. [ABSTRACT FROM AUTHOR]

Cluster analysis is often regarded as a pretreatment step in many data mining applications. It is an unsupervised learning method that tries to find some distributions and patterns in unlabeled data sets. Clustering algorithms have been studied for decades, but we think that none of them is all purpose. This paper presents three fast synchronization clustering algorithms based on spatial index structures, which are three improved versions of SynC algorithm in time complexity. In order to clearly describe these algorithms, it lists or introduces several concepts. After the theoretic analysis of the three FSynC algorithms, we find the time complexity can be decreased by using an R-tree index structure or by combining a multi-dimensional grid cell partitioning method with a Red-Black tree structure to construct the near neighbor point sets of all points. In the simulations, SynC algorithm is used as the comparative algorithm of three FSynC algorithms. From the simulated experiments of some artificial data sets, seven UCI data sets, and three picture data sets, we observe that the three FSynC algorithms need less time cost than SynC algorithm in many kinds of data sets. So we can say our three fast synchronization clustering algorithms can replace SynC algorithm with less time cost in many kinds of data sets. At last, it gives several solid and insightful future research suggestions. [ABSTRACT FROM AUTHOR]

In the field of vehicular wireless sensor networks-based structural health monitoring, the structural damage identification is achieved by two structural features, namely natural frequencies and mode shapes. The kind of data fusion-based routing algorithm in specific applications needs to meet time synchronization requirements and meet certain constraints, such as the single-hop communication between cluster head node and each node in cluster, the overlap between different clusters and so on. To meet the special constraints for data fusion-based routing algorithm in structural health monitoring, this paper proposed a new method based on an improved flooding time synchronization protocol, which is called time synchronization and enhanced greedy algorithm based on D(v) (TSDEGA) routing algorithm. The TSDEGA method can achieve the minimum connected cover by node's own degree D(v), and it can also meet the structural health monitoring routing constraints. The simulation experiments show that TSDEGA has better energy resistance and longer network lifetime, and it is superior to the traditional greedy algorithms. The proposed algorithm can effectively eliminate interference of outliers and improve the accuracy in order to meet time synchronization requirements in structural health monitoring applications. [ABSTRACT FROM AUTHOR]

With the emerging Internet of Things (IoT) technology becoming reality, a number of applications are being proposed. Several of these applications are highly dependent on wireless sensor networks (WSN) to acquire data from the surrounding environment. In order to be really useful for most of applications, the acquired data must be coherent in terms of the time in which they are acquired, which implies that the entire sensor network presents a certain level of time synchronization. Moreover, to efficiently exchange and forward data, many communication protocols used in WSN rely also on time synchronization among the sensor nodes. Observing the importance in complying with this need for time synchronization, this work focuses on the second synchronization problem, proposing, implementing and testing a time synchronization service for low-power WSN using low frequency real-time clocks in each node. To implement this service, three algorithms based on different strategies are proposed: one based on an auto-correction approach, the second based on a prediction mechanism, while the third uses an analytical correction mechanism. Their goal is the same, i.e., to make the clocks of the sensor nodes converge as quickly as possible and then to keep them most similar as possible. This goal comes along with the requirement to keep low energy consumption. Differently from other works in the literature, the proposal here is independent of any specific protocol, i.e., it may be adapted to be used in different protocols. Moreover, it explores the minimum number of synchronization messages by means of a smart clock update strategy, allowing the trade-off between the desired level of synchronization and the associated energy consumption. Experimental results, which includes data acquired from simulations and testbed deployments, provide evidence of the success in meeting this goal, as well as providing means to compare these three approaches considering the best synchronization results and their costs in terms of energy consumption. [ABSTRACT FROM AUTHOR]

Recent advances in Convolutional Neural Networks (CNNs) have obtained promising results in difficult deep learning tasks. However, the success of a CNN depends on finding an architecture to fit a given problem. A hand-crafted architecture is a challenging, time-consuming process that requires expert knowledge and effort, due to a large number of architectural design choices. In this article, we present an efficient framework that automatically designs a high-performing CNN architecture for a given problem. In this framework, we introduce a new optimization objective function that combines the error rate and the information learnt by a set of feature maps using deconvolutional networks (deconvnet). The new objective function allows the hyperparameters of the CNN architecture to be optimized in a way that enhances the performance by guiding the CNN through better visualization of learnt features via deconvnet. The actual optimization of the objective function is carried out via the Nelder-Mead Method (NMM). Further, our new objective function results in much faster convergence towards a better architecture. The proposed framework has the ability to explore a CNN architecture’s numerous design choices in an efficient way and also allows effective, distributed execution and synchronization via web services. Empirically, we demonstrate that the CNN architecture designed with our approach outperforms several existing approaches in terms of its error rate. Our results are also competitive with state-of-the-art results on the MNIST dataset and perform reasonably against the state-of-the-art results on CIFAR-10 and CIFAR-100 datasets. Our approach has a significant role in increasing the depth, reducing the size of strides, and constraining some convolutional layers not followed by pooling layers in order to find a CNN architecture that produces a high recognition performance. [ABSTRACT FROM AUTHOR]

Recent years have witnessed the booming popularity of CLS platforms, through which numerous amateur broadcasters live stream their video contents to viewers around the world. The heterogeneous qualities and formats of the source streams, however, require massive computational resources to transcode them into multiple industrial standard quality versions to serve viewers with distinct configurations, and the delays to the viewers of different locations should be well synchronized to support community interactions. This article attempts to address these challenges and to explore the opportunities with new generation computation paradigms, in particular, fog computing. We present a novel fog-based transcoding framework for CLS platforms to offload the transcoding workload to the network edge (i.e., the massive number of viewers). We evaluate our design through our PlanetLab-based experiment and real-world viewer transcoding experiment. [ABSTRACT FROM PUBLISHER]

This paper situates itself in the theory of variable length codes and of finite automata where the concepts of completeness and synchronization play a central role. In this theoretical setting, we investigate the problem of finding upper bounds to the minimal length of synchronizing words and incompletable words of a finite language X in terms of the length of the words of X . This problem is related to two well-known conjectures formulated by Černý and Restivo, respectively. In particular, if Restivo's conjecture is true, our main result provides a quadratic bound for the minimal length of a synchronizing pair of any finite synchronizing complete code with respect to the maximal length of its words. [ABSTRACT FROM AUTHOR]

Reader-mostly synchronization schemes, such as rwlocks and RCU, aim to maximize parallelism among readers, but many existing designs either cause readers to contend, or significantly extend writer latency, or both. This paper attributes such a problem to the lack of a fast consensus protocol between readers and writers, by which the two parts cooperate to obey the semantics of a synchronization construct. This paper describes FCP, a fast consensus protocol among readers and writers that provides scalable read-side performance as well as small writer latency for TSO architectures. The heart of FCP is a version-based consensus protocol between multiple non-communicating readers and a pending writer. FCP leverages bounded staleness of memory consistency to avoid atomic instructions and memory barriers in readers’ common paths, and uses message-passing (e.g., IPI) for straggling readers so that the writer latency can be bounded. To demonstrate the effectiveness of FCP, this paper applies FCP to construct a scalable reader-writers lock (rwlock) and a scalable RCU implementation. Evaluation on a 64-core machine shows that FCP significantly boosts the performance of the Linux virtual memory subsystem, a concurrent hashtable and an in-memory database. Micro-benchmarks show that FCP achieves smaller reader-side latency and lower writer-side latency when compared to state-of-the-art rwlocks and RCU implementation. [ABSTRACT FROM AUTHOR]

The paper presents a source-to-source compiler, TRACO, for automatic extraction of both coarse-and fine-grained parallelism available in C/C++ loops. Parallelization techniques implemented in TRACO are based on the transitive clo-sure of a relation describing all the dependences in a loop. Coarse-and fine-grained parallelism is represented with synchronization-free slices (space partitions) and a legal loop statement instance schedule (time partitions), respectively. TRACO enables also applying scalar and array variable privatization as well as parallel reduction. On its output, TRACO produces compilable parallel OpenMP C/C++ and/or OpenACC C/C++ code. The effectiveness of TRACO, efficiency of parallel code produced by TRACO, and the time of parallel code production are evaluated by means of the NAS Parallel Benchmark and Polyhedral Benchmark suites. These features of TRACO are compared with closely related compilers such as ICC, Pluto, Par4All, and Cetus. Feature work is outlined. [ABSTRACT FROM AUTHOR]

Clock synchronization is highly desirable in distributed systems, including many applications in the Internet of Things and Humans. It improves the efficiency, modularity, and scalability of the system, and optimizes use of event triggers. For IoTH, BLE - a subset of the recent Bluetooth v4.0 stack - provides a low-power and loosely coupled mechanism for sensor data collection with ubiquitous units (e.g., smartphones and tablets) carried by humans. This fundamental design paradigm of BLE is enabled by a range of broadcast advertising modes. While its operational benefits are numerous, the lack of a common time reference in the broadcast mode of BLE has been a fundamental limitation. This article presents and describes CheepSync, a time synchronization service for BLE advertisers, especially tailored for applications requiring high time precision on resource constrained BLE platforms. Designed on top of the existing Bluetooth v4.0 standard, the CheepSync framework utilizes low-level timestamping and comprehensive error compensation mechanisms for overcoming uncertainties in message transmission, clock drift, and other system-specific constraints. CheepSync was implemented on custom designed nRF24Cheep beacon platforms (as broadcasters) and commercial off-the-shelf Android ported smartphones (as passive listeners). We demonstrate the efficacy of CheepSync by numerous empirical evaluations in a variety of experimental setups, and show that its average (single-hop) time synchronization accuracy is in the 10 μs range. [ABSTRACT FROM PUBLISHER]

Software transactional memory (STM) is one of the techniques used towards achieving non-blocking process synchronization in multi-threaded computing environment. In spite of its high potential, one of the major limitations of transactional memory (TM) is that in order to ensure data consistency as well as progress condition, TM often forces transactions to abort. This paper proposes a new concurrency control mechanism. It starts with the existing TM implementations for obstruction freedom and eventually builds a new STM methodology. The primary objective is to reduce aborting of transactions in some typical scenarios. A programming model is described for a chain of update transactions that share the same data object among themselves. Using the proposed approach, any new update transaction appended in this chain need not wait for the earlier transactions to finish. The proposed STM allows wait-free, non-blocking implementation of a mix of read and multiple update transactions on the same shared data object with higher throughput. [ABSTRACT FROM AUTHOR]

In order to overcome the vulnerability of the global navigation satellite system (GNSS) and provide robust position, navigation and time (PNT) information in marine navigation, the autonomous positioning system based on ranging-mode Automatic Identification System (AIS) is presented in the paper. The principle of the AIS autonomous positioning system (AAPS) is investigated, including the position algorithm, the signal measurement technique, the geometric dilution of precision, the time synchronization technique and the additional secondary factor correction technique. In order to validate the proposed AAPS, a verification system has been established in the Xinghai sea region of Dalian (China). Static and dynamic positioning experiments are performed. The original function of the AIS in the AAPS is not influenced. The experimental results show that the positioning precision of the AAPS is better than 10 m in the area with good geometric dilution of precision (GDOP) by the additional secondary factor correction technology. This is the most economical solution for a land-based positioning system to complement the GNSS for the navigation safety of vessels sailing along coasts. [ABSTRACT FROM AUTHOR]

In real-time systems, both scheduling theory and resource access protocols have been studied extensively. However, there is very limited research on scheduling algorithms for real-time systems with shared resources, where the problem becomes more prominent with the emergence of multicore processors. In this paper, focusing on partitioned-EDF scheduling and MSRP resource access protocol, we study the utilization bound and efficient task mapping schemes for a set of periodic real-time tasks that access shared resources in multiprocessor/multicore systems. Specifically, with synchronization overhead being considered, we illustrate the schedulability anomaly for such systems. We develop the first synchronization-cognizant utilization bound and further analyze its non-monotonicity where the bound can decrease when more processors are deployed. Then, we show that finding the optimal mapping for tasks with shared resources is NP-hard. Based on a novel approach that iteratively tightens the synchronization overhead, we propose two efficient synchronization-cognizant task mapping algorithms (SC-TMA) with the goal of achieving better schedulability and balanced workload on deployed processors. Finally, the proposed SC-TMA schemes are evaluated through extensive simulations with synthetic tasks. The results show that, the schedulability ratio and (average) system load under SC-TMA are close to that of an INLP (Integer Non-Linear Programming) based solution for small task systems. When compared to the existing task mapping algorithms, SC-TMA obtain much better schedulability ratio and lower/balanced workload on all processors. [ABSTRACT FROM AUTHOR]

Network simulation is an important tool for testing and evaluating wireless sensor network applications. Parallel simulation strategies improve the scalability of these tools. However, achieving high performance depends on reducing the synchronization overhead among simulation processes. In this paper, we present an optimistic simulation algorithm with support for backtracking and re-execution. The algorithm reduces the number of synchronization cycles to the number of transmissions in the network under test. We implement SnapSim, an extension to the popular Avrora simulator, based on this algorithm. The experimental results show that our prototype system improves the performance of Avrora by 2 to 10 times for typical network-centric sensor network applications, and up to three orders of magnitude for applications that use the radio infrequently. We also implement a distributed version of SnapSim, D-SnapSim, which runs on a cluster. The experimental results show that D-SnapSim further improves the performance of SnapSim by up to 10 times for applications that use the radio frequently. [ABSTRACT FROM AUTHOR]

We present DRASync, a region-based allocator that implements a global address space abstraction for MPI programs with pointer-based data structures. The main features of DRASync are: (a) it amortizes communication among nodes to allow efficient parallel allocation in a global address space; (b) it takes advantage of bulk deallocation and good locality with pointer-based data structures; (c) it supports ownership semantics of regions by nodes akin to reader–writer locks, which makes for a high-level, intuitive synchronization tool in MPI programs, without sacrificing message-passing performance. We evaluate DRASync against a state-of-the-art distributed allocator and find that it produces comparable performance while offering a higher-level abstraction to programmers. [ABSTRACT FROM PUBLISHER]

This study described and evaluated a model-driven approach that maps structural adaptations in autonomic software, to updates for its runtime test model and provided a workflow and meta-model to support the approach, referred to as Test Information Propagation (TIP). The accuracy of the proposed approach has been evaluated on two systems: an open source system and an Adaptive Java Healthcare Application with Self-Test. Also considered was the work of a developer who manually identified changes that should to be performed to update the test model after self-adaptation occurs. The experiments show how the TIP propagation engine provides the highest accurate precision measures on both systems, while promising results have been achieved using recall measure. [ABSTRACT FROM AUTHOR]

In the search for new paradigms to simplify multithreaded programming, Transactional Memory (TM) is currently being advocated as a promising alternative to deadlock-prone lock-based synchronization. In this way, future many-core CMP architectures may need to provide hardware support for TM. On the other hand, power dissipation constitutes a first class consideration in multicore processor designs. In this work, we propose Selective Dynamic Serialization (SDS) as a new technique to improve energy consumption without degrading performance in applications with conflicting transactions by avoiding wasted work due to aborted transactions. Our proposal, which is implemented on top of a hardware transactional memory (HTM) system with an eager conflict management policy, detects and serializes conflicting transactions dynamically (at run-time). In its simplest form, in case of conflict, one transaction is allowed to continue whilst the rest are completely stalled. Once the executing transaction has finished, it wakes up several of the stalling transactions. More elaborated implementations of SDS try to delay this behavior until serialization of transactions is profitable, achieving the best trade-off between performance, energy savings and network traffic. SDS implementations differ from each other in the condition that triggers the serialization mode. We have evaluated several SDS schemes using GEMS, a full-system simulator implementing the LogTM-SE Eager-Eager HTM system, and several benchmarks from the STAMP suite. Results for a 16-core CMP show that SDS obtains reductions of 6 % on average in energy consumption (more than 20 % in high contention scenarios) in a wide range of benchmarks without affecting, on average, execution time. At the same time, network traffic level is also reduced by 22 %. [ABSTRACT FROM AUTHOR]

We present an experience report on automating the verification of the software barrier synchronization primitive. The informal specification of the primitive is: when a thread calls the software barrier function, the thread halts until all other threads call their instances of the software barrier function. A successful software barrier call ensures that each thread has finished its portion of work before the threads start exchanging the results of these portions of work. While software barriers are widely used in parallel versions of major numerical algorithms and are indispensable in scientific computing, software barrier algorithms and their implementations scarcely have been verified. We improve the state of the art in proving the correctness of the major software barrier algorithms with off-the-shelf automatic verification systems such as Jahob, VCC, Boogie, Spin and Checkfence. We verify a central barrier, a C implementation of a barrier, a static tree barrier, a combining tree barrier, a dissemination barrier, a tournament barrier, a barrier with its client and a barrier on a weak memory model. In the process, we introduce a novel theorem proving method for proving validity of formulas containing cardinalities of comprehensions and improve the capabilities of one of the verification systems. Based on our experience, we propose new challenges in the verification of software barriers. [ABSTRACT FROM AUTHOR]

In this paper, we propose a distributed synchronization algorithm for wireless mesh networks based on orthogonal frequency division multiple access. For time and frequency synchronization, a node requests its neighbor nodes for a change of fast Fourier transform starting points, transmission times, and carrier frequencies needed for synchronization. The node also updates its own time and frequency elements through simple formulas based on request messages received from neighbor nodes using a guard interval and a cyclic prefix. This process with the cooperation of neighbor nodes leads to a gradual synchronization of all nodes in the network. Through a performance comparison with a conventional scheme, we obtain simulation results indicating that the proposed scheme outperforms the conventional scheme in random topologies and a grid topology. [ABSTRACT FROM AUTHOR]

The accurate and efficient operation of many applications and protocols in wireless sensor networks require synchronized notion of time. To achieve network-wide time synchronization, a common strategy is to flood current time information of a reference node into the network, which is utilized by the de facto time-synchronization protocol Flooding Time-Synchronization Protocol (FTSP). In FTSP, the propagation speed of the flood is slow because each node waits for a given period of time to propagate its time information about the reference node. It has been shown that slow-flooding decreases the synchronization accuracy and scalability of FTSP drastically. Alternatively, rapid-flooding approach is proposed in the literature, which allows nodes to propagate time information as quickly as possible. However, rapid flooding is difficult and has several drawbacks in wireless sensor networks. In this paper, our aim is to reduce the undesired effect of slow-flooding on the synchronization accuracy without changing the propagation speed of the flood. Within this context, we realize that the smaller the difference between the speeds of the clocks, the smaller the undesired effect of waiting times on the synchronization accuracy. In the light of this realization, our main contribution is to show that the synchronization accuracy and scalability of slow-flooding can drastically be improved by employing a clock speed agreement algorithm among the sensor nodes. We present an evaluation of this strategy on a testbed setup including 20 MICAz sensor nodes. Our theoretical findings and experimental results show that employing a clock speed agreement algorithm among the sensor nodes drastically improves the synchronization accuracy and scalability of slow-flooding. [ABSTRACT FROM AUTHOR]

In this paper, synchronization of chaotic Lur'e systems using sampled-data control is applied to the secure communication problem. The message is transmitted and masked by the techniques of n-cipher and a public key obtained by the chaotic Lur'e system. The decryption of the transmitted encrypted message to recover the original message at the receiver can be achieved by synchronizing the transmitter and receiver chaotic systems. Sampled-data feedback control is used for synchronization, and a sufficient condition for obtaining feedback gain is derived in terms of linear matrix inequalities using a discontinuous Lyapunov functional. The secure communication system is simulated via Matlab along with the Chua system to show the effectiveness of the proposed result. [ABSTRACT FROM AUTHOR]

The use of an external injection-locking source prevents undesired frequency shifts in coupled-oscillator systems. Here an explicit formulation for the analysis of these systems is presented, based on a numerical model of the oscillator elements in free-running regime, obtained with harmonic balance. It demonstrates the opposed effects of oscillator coupling and injection locking in a realistic manner and brings to light the influence of the oscillator characteristics and coupling-network parameters. The explicit expressions provide the minimum injection-locking power required for a full variation of the inter-stage phase shift and enable the locking bandwidth to be fixed or maximized through a suitable choice of the coupling networks. Two different cases are considered: a basic system of three oscillator elements and a general system with any number of elements. In the latter case, the influence of the particular element chosen for the signal injection on the synchronization bandwidth is studied. The stability analysis is based on a perturbation system, which, unlike previous works, relies on a direct analytical calculation of the steady-state solutions, instead of a numerical one. This enables the full coverage of all possible solutions and hence an in-depth understanding of the influence of the coupling network and injection source on the stable phase-shift ranges. The phase noise analysis, applied to the same explicit formulation, demonstrates the injection locking effects and enables the identification of different regions as the offset frequency increases. [ABSTRACT FROM AUTHOR]

Graphical workflow modeling tools, such as UML and DAG, can facilitate users to express workflow process logic, but lack of abilities to carry out simulation and correctness checking. In this paper, based on Petri net, we propose a service composition oriented Grid workflow model and its related six elementary workflow patterns: sequence, condition, iteration, concurrency, synchronization, and triggering. In addition, we present our Grid workflow analysis approaches on three aspects: workflow reachability verification, workflow deadlock verification, and workflow optimization. The experimental results show that our workflow verification and optimization mechanisms are feasible and efficient. [ABSTRACT FROM AUTHOR]

Many happened-before-based detectors for debugging multithreaded programs implement vector clocks to incrementally track the casual relations among synchronization events produced by concurrent threads and generate trace logs. They update the vector clocks via vector-based comparison and content assignment in every case. We observe that many such tracking comparison and assignment operations are removable in part or in whole, which if identified and used properly, have the potential to reduce the log traces thus produced. This paper presents our analysis to identify such removable tracking operations and shows how they could be used to reduce log traces. We implement our analysis result as a technique entitled LOFT. We evaluate LOFT on the well-studied PARSEC benchmarking suite and five large-scale real-world applications. The main experimental result shows that on average, LOFT identifies 63.9 percent of all synchronization operations incurred by the existing approach as removable and does not compromise the efficiency of the latter. [ABSTRACT FROM PUBLISHER]

We present a novel framework for automatic inference of efficient synchronization in concurrent programs, a task known to be difficult and error-prone when done manually. Our framework is based on abstract interpretation and can infer synchronization for infinite state programs. Given a program, a specification, and an abstraction, we infer synchronization that avoids all (abstract) interleavings that may violate the specification, but permits as many valid interleavings as possible. Combined with abstraction refinement, our framework can be viewed as a new approach for verification where both the program and the abstraction can be modified on-the-fly during the verification process. The ability to modify the program, and not only the abstraction, allows us to remove program interleavings not only when they are known to be invalid, but also when they cannot be verified using the given abstraction. We implemented a prototype of our approach using numerical abstractions and applied it to verify several example programs. [ABSTRACT FROM AUTHOR]

This paper analyzes the end-to-end delay of EtherCAT-based control processes that use the events of message frames and global clock for synchronized operation. With the end-to-end delay defined as the time interval between the start of a process cycle and the actual input or output, we develop a holistic delay model for control processes with EtherCAT, by taking into account the time for in-controller processing, message delivery, and slave-local handling. Based on the measurements from a real EtherCAT control system, we discuss the average and deviation of the process delay as we vary the number of slaves and process cycle time. The experiment results show that the output delays are mainly increased by the average controller delay, whereas the input delays are more affected by the deviation rather than the average of the controller delay. Our in-depth analysis on the controller reveals that the DMA (Direct Memory Access) overhead chiefly enlarges the controller delay for increasing number of slaves, while task release jitter is the main cause of the increased delay for longer cycle time. The presented delay model and evaluation results can be essentially used for the design of EtherCAT-based automation that requires highly synchronized operations, such as for coordinated motion and high-precision data sensing. [ABSTRACT FROM AUTHOR]

Abstract: Lock synchronization is a key programming primitive for shared-memory many-core CMPs. However, as the number of cores increases, conventional software implementations cannot meet the desirable levels of performance and scalability. Meanwhile, most existing hardware-supported lock proposals require modifications at some level of the memory hierarchy, thus degrading QoS of applications through synchronization traffic. In this paper, we propose GLock, a dedicated network infrastructure and a token-based message-passing protocol to provide a non-intrusive, extremely efficient and fair implementation for highly contended locks. Two implementations of GLock are considered. The first leverages current full-custom G-lines technology, whilst the second uses a cost-effective mainstream industrial toolflow with an advanced 45 nm technology. When compared with the most efficient software-based lock, both alternatives provide significant reductions in execution time, network traffic and power consumption, for a representative set of benchmarks, with negligible area overhead. [Copyright &y& Elsevier]

Abstract: Correlation based Minimum Spanning Tree (MST) networks are instrumental in capturing the basic workings of a system and have been accepted for use in the analysis of stock and currency exchange markets. Research in network analysis of financial markets shows that although correlations underlying MST networks capture essential information, they do not faithfully capture dynamic behavior embedded in the time series data of financial systems. We present a new Phase Synchronization (PS) based method for establishing correlations between nonlinear time series data, prior to constructing the MST. In this method, time series data generated by each entity in a system is transformed to a recurrence plot and the recurrence plots are further transformed to trajectories in phase space. For each pair of trajectories, phase synchronization (PS) is quantified based on the degree of phase locking observed. Distances for the MST are then computed as a function of the PS between each entity pair. We demonstrate the method using Thailand Baht exchange rates with 82 countries from 2004 to 2012. We further analyze and compare networks constructed using the PS method (PS-MST) and the existing cross-correlation method (CC-MST), to study the differences in market dynamics captured by these methods. [Copyright &y& Elsevier]

Self-synchronization under the presence of additive noise can be achieved by allocating a certain number of bits of each codeword as markers for synchronization. Difference systems of sets are combinatorial designs which specify the positions of synchronization markers in codewords in such a way that the resulting error-tolerant self-synchronizing codes may be realized as cosets of linear codes. Ideally, difference systems of sets should sacrifice as few bits as possible for a given code length, alphabet size, and error-tolerance capability. However, it seems difficult to attain optimality with respect to known bounds when the noise level is relatively low. In fact, the majority of known optimal difference systems of sets are for exceptionally noisy channels, requiring a substantial amount of bits for synchronization. To address this problem, we present constructions for difference systems of sets that allow for higher information rates while sacrificing optimality to only a small extent. Our constructions utilize optimal difference systems of sets as ingredients and, when applied carefully, generate asymptotically optimal ones with higher information rates. We also give direct constructions for optimal difference systems of sets with high information rates and error tolerance that generate binary and ternary self-synchronizing codes. [ABSTRACT FROM PUBLISHER]