38 results on '"Ueng, Yeong-Luh"'
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2. An Efficient K-Best MIMO Detector for Large Modulation Constellations
3. A Joint Design of SCMA Codebook and PTS-Based PAPR Reduction for Downlink OFDM Scheme.
4. Interblock memory for turbo coding
5. An Efficient Short High-Order Non-Binary LDPC Decoder Architecture Using a Message-Adaptation EMS Algorithm
6. Low-density parity-check coded recording systems with run-length-limited constraints
7. On trellis codes with a delay processor and a signal mapper
8. A Node-Reliability Based CRC-Aided Successive Cancellation List Polar Decoder Architecture Combined With Post-Processing
9. Seal imprint verification via feature analysis and classifications
10. An LDPC-Coded SCMA Receiver With Multi-User Iterative Detection and Decoding
11. A Low-Complexity Massive MIMO Detection Based on Approximate Expectation Propagation
12. Iterative Inter-Cell Interference Cancellation Receiver for LDPC-Coded MIMO Systems
13. An Integrated Message-Passing Detector and Decoder for Polar-Coded Massive MU-MIMO Systems
14. Automatic Seal Imprint Verification Systems Using Edge Difference
15. Rateless Coded Multiplexing for Downlink Transmission With Two Users: Performance Analysis and System Design
16. An Efficient High-Rate Non-Binary LDPC Decoder Architecture With Early Termination
17. An Efficient Combined Bit-Flipping and Stochastic LDPC Decoder Using Improved Probability Tracers
18. Optimization Techniques for the Efficient Implementation of High-Rate Layered QC-LDPC Decoders
19. Strategies for Reducing Decoding Cycles in Stochastic LDPC Decoders
20. Two Trellis Coding Schemes for Large Free Distances
21. An Iterative Detection and Decoding Receiver for LDPC-Coded MIMO Systems
22. Raptor-Coded Noncoherent Cooperative Schemes Based on Distributed Unitary Space–Time Modulation
23. An RLL-Constrained LDPC Coded Recording System Using Deliberate Flipping and Flipped-Bit Detection
24. A 5.4 $\mu{\rm W}$ Soft-Decision BCH Decoder for Wireless Body Area Networks
25. A Fully Parallel LDPC Decoder Architecture Using Probabilistic Min-Sum Algorithm for High-Throughput Applications
26. LDPC Decoding Scheduling for Faster Convergence and Lower Error Floor
27. Differential Amplitude/Phase Modulation for Correlated Rayleigh Fading Channels: Performance Analysis and Labeling Design
28. A High-Throughput Trellis-Based Layered Decoding Architecture for Non-Binary LDPC Codes Using Max-Log-QSPA
29. An Efficient Multi-Standard LDPC Decoder Design Using Hardware-Friendly Shuffled Decoding
30. Two Informed Dynamic Scheduling Strategies for Iterative LDPC Decoders
31. Noncoherent Amplitude/Phase Modulated Transmission Schemes for Rayleigh Block Fading Channels
32. An RLL-Constrained LDPC Coded Recording System Using Deliberate Flipping and Flipped-Bit Detection
33. Jointly Designed Architecture-Aware LDPC Convolutional Codes and Memory-Based Shuffled Decoder Architecture
34. An Efficient Layered Decoding Architecture for Nonbinary QC-LDPC Codes
35. Turbo Coded Noncoherent Space-Time Modulation Using Information-Bearing Pilots and Spatial Multiplexing
36. Processing-Task Arrangement for a Low-Complexity Full-Mode WiMAX LDPC Codec
37. A Multimode Shuffled Iterative Decoder Architecture for High-Rate RS-LDPC Codes
38. A 5.4 \muW Soft-Decision BCH Decoder for Wireless Body Area Networks.
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