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The safe operation and lifetime of the power module are heavily dependent on the temperature distribution, making it imperative to optimize the thermal performance of the layout at the design stage. During the module design phase, a significant number of layouts are assessed. It is important to constrain computational complexity while achieving high accuracy. Mechanistic modeling and data-driven modeling have limitations in terms of complexity and generalizability respectively. Therefore, this article proposes a hybrid data-driven and mechanistic modeling approach. This approach incorporates the theoretical analysis of mechanistic modeling and the high efficiency of data-driven modeling to accurately and efficiently compute the temperature distribution of a given layout. This approach initially acquires the dataset from simple structures and conducts a dimensionality reduction to obtain the isothermal point set (IPS). Later, IPS of complex structures is developed based on mechanistic modeling. Finally, the IPS is converted to a field to obtain a temperature distribution of the given layout. The accuracy of the approach is verified by a steady-state thermal experiment. With the proposed approach, an accurate assessment of surface thermal distribution of different layouts can be quickly finished. The thermal characteristics evaluation efficiency can be improved roughly 300 times, which provides the necessary technical basis for layout optimization.

In a wireless power transfer (WPT) system, the coil-to-coil transfer efficiency is significantly influenced by the performance of coupling coils. The self-resonant coil is widely employed for its excellent performance. Existing coil modeling methods suffer from significant errors or computational complexity, making them unsuitable for the design and optimization of coils. This article presents a modified analytical method for self-resonant coil modeling, with a specific focus on calculating the self-resonant frequency (SRF), ohmic resistance, and quality factor. First, considering the nonidentical current distribution along the self-resonant coil, a segmented filament model is formulated to calculate the SRF and current distribution. Furthermore, the uneven current density distribution on the wire's cross section is considered, and a modified segmented filament model is presented, where the current density is equated to a conduction current filament plus a pair of proximity current dipoles. The magnetic field arising from neighboring wires can, then, be calculated, enabling the determination of ohmic resistance and quality factor. Simulation and measurement results validate the accuracy of the modified model for both tightly and loosely wound coils. This model is employed to optimize the ohmic resistance and quality factor during the coil design process. To further enhance the quality factor across the entire operating frequency range, an unequal-pitch coil structure is proposed, along with a novel design guideline for coil optimization. Following this guideline, a 6.71 MHz unequal-pitch self-resonant coil is designed, fabricated, and measured. The coil-to-coil transfer efficiency reaches 95.8% and 82.7% at a transfer distance-to-coil diameter ratio of 1 (${{d}_{\text{TR}}} = 20{\rm{\ cm}}$) and 2 (${{d}_{\text{TR}}} = 40{\rm{\ cm}}$), respectively. Furthermore, an experimental prototype of a high-efficiency mid-range WPT system is constructed using the optimized coils. Specifically, the overall efficiency of the WPT system reaches 81.2% when ${{d}_{\text{TR}}} = 20{\rm{\ cm}}$ and 63.2% when ${{d}_{\text{TR}}} = 40{\rm{\ cm}}$.

With the development of high-temperature packaging technology, silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (mosfets) can operate under high-temperature conditions with junction temperatures exceeding 175 °C, providing a solution for pulsed power applications facing instantaneous high currents and significant temperature fluctuations. However, the electro-thermal coupling behaviors and safe operating area (SOA) of SiC mosfets in a wide temperature range are unclear, and there is a lack of guiding principles for SiC module packaging and heat dissipation design in pulsed power applications. In this article, an electro-thermal coupling model of SiC mosfet modules is established. The electrical model over a wide temperature range (25 °C–375 °C) is built in Simulink, and the thermal finite element model is established in COMSOL, while MATLAB script is used to implement interaction between the two models. Then, detailed analyses are conducted on the electro-thermal coupling behaviors of SiC mosfet modules. Besides, the impact of packaging on the SOA of SiC mosfet modules is researched. In addition, a transient junction temperature measurement method of SiC mosfets is proposed by using the on-state resistance Rds(on) as the temperature-sensitive electrical parameter. Finally, the discharge experiments of the capacitor bank through resistive loads are carried out under short pulse and long pulse, respectively, and the experimental results are consistent with the model.

Press-pack power module has recently become a crucial component for large-current and high-power facilities. Several semiconductor chips are connected in parallel inside the module. Due to the complex coupling of electrical, thermal, and mechanical fields within the device, the imbalance in pressure distribution and heat dissipation capacity may lead to uneven current distribution and potential overloading of certain chips. Chip-level online current sensing is an effective approach to provide current monitoring and fault diagnosis. However, it is difficult to accomplish high-accuracy chip-level current sensing considering the bandwidth and size of sensors. In this article, a compact hybrid sensor consisting of anisotropic magnetoresistance (AMR) and Rogowski coil for chip-level online sensing is proposed. Rogowski coil possesses the advantage to measure the high-frequency current and AMR sensor is used to expand the dc and low-frequency bandwidth of the coil. The principle and the design of Rogowski coil and AMR sensor are analyzed. The magnetic fields generated by multiple chips tend to couple with each other. To enhance the accuracy of AMR, a decoupling matrix is calculated to decouple the crosstalk of magnetic fields. The implementation of the hybrid sensor is proposed. The hybrid sensor is used to measure the chip-level current of a press-pack insulate gate bipolar transistorv (IGBT) in a buck converter whose frequency is 40 kHz. The output of hybrid sensor is verified by the commercial current transducer. The result shows that the hybrid sensor achieves chip-level current sensing for press-pack power module, with a measurement bandwidth ranging from dc to 30 MHz, an accuracy of 2% and excellent linearity.

As the encapsulation material, silicone gel is in contact with the high voltage electrodes of the semiconductor device and direct bonded copper (DBC) ceramic substrate. The voltage level of the power module increases from 6.5 kV for Si-IGBT to 10–25 kV for the SiC power module, which may lead to electrical tree initiation in silicone gel. Studies on electrical trees focus on ac sine wave and unipolar voltage with low frequency, distinguishing from the unipolar square wave voltage with high frequency in power modules. This article studies the characteristics of electrical trees in silicone gel under unipolar high-frequency square voltage, the real working environment of silicone gel. The imposed voltage is 10–18 kV, the frequency is 50 Hz, 200 Hz,…, 10 kHz, and the pulsewidth is 10%, 30%,…, 90%. The trees observed in this article are branch-like or bush-like trees, where the newly generated branch exhibits a string of bubbles or very thin filament channels. It is found that the voltage amplitude has a significant effect on the propagation of the electrical tree. High-voltage amplitude leads to denser branches and longer tree lengths. Similarly, the frequency can promote the growth of electrical trees. Higher frequency leads to longer length and higher fractal dimension, as well as higher growth rate. The pulsewidth, however, mainly influences the electrical tree morphology. This study may be useful for the improvement of insulation and design of power modules with high voltage and high frequency.

The input-parallel output-parallel (IPOP) dc–dc converter is suitable for high-current applications, such as voltage regulator module. However, the parameter mismatch in the IPOP converter causes uneven current sharing between the constituent modules, which makes the IPOP converter unreliable for practical use. In this article, a coupled-inductor-based IPOP quasi-resonant (QR) single-stage dc–dc converter is proposed to mitigate the current difference. The coupled inductor integrates the discrete external inductors of parallel modules to automatically balance the primary currents between modules and act as resonant inductors, which can reduce the number of magnetic components and simplify the control strategy. Besides, primary switches of QR single-stage converter can achieve zero-voltage switching (ZVS), and synchronous rectifiers can achieve ZVS and zero-current switching with the resonance, resulting in the efficiency improvement. What is more, the current sharing method can be extended to an N-module converter with an N-phase coupled inductor. Finally, a 48-V/1.8-V 144-W two-module QR single-stage converter prototype is made and tested to verify the analysis.

It is significant to study power device package fatigue failure as it seriously affects the reliability of power systems. Nevertheless, the research of the power device failure process is insufficient. In this article, an accurate and intelligent approach is proposed to predict the power device fatigue failure process with multiple fatigue sampling method (MFSM) and minimal component unit method (MCUM). The MFSM is proposed to accurately build the power device lifetime model. It is accomplished through the multiple sampling fatigue morphology evolution process of solder layers combined with the fatigue parameter. Morphology evolution is detected by scanning acoustic microscope technology under an accelerated lifetime test. The fatigue parameter is obtained through finite-element analysis (FEA) by establishing each sampling geometry model. Then, the lifetime model is determined by their same failure area fraction (Fs). In particular, digital image processing is applied to describe solder layer shapes in detail, which is also the key to building a real FEA geometry model. The MCUM is utilized to complete the prediction of failure process, where solder layers are divided into minimal units and the FEA solution and location information of each unit are known. Based on the lifetime model, the failure area can be determined and the fatigue failure process can be finished intelligently by cosimulation. The proposed method is accurate and intelligent enough in predicting the failure of solder layers, which is more helpful for planned device management.

This article proposes a digital signal feedback sensor design method for silicon carbide (SiC) mosfet modules to be used in active gate drivers in the future. This real-time detection method provides high bandwidth, high integrated density, and low latency in transient measurements. In this article, novel solutions are developed to address the shortcomings of the current research. First, the boundary conditions for nonisolated voltage measurement of ${V_{\text{DS}}}$ and ${V_{\text{KS}}}$ in SiC-mosfet modules are established. Second, the delay time of each state variable is specified for digital real-time detection. Third, the effect of temperature on parasitic resistance is analyzed during transients and ${I_{D}}$ is calculated in real time using a correction filter algorithm. For verification, a digital signal feedback sensor was applied to a double-pulse circuit. The results show a high integrated density of up to ${1.3\text{kA}/{\text{in}}^{3}}$ and ${\text{6.7}\,\text{kV}/{\text{in}}^{3}}$ while achieving a bandwidth of more than ${\text{20}\,\text{MHz}}$. The relative error of measuring ${V_{\text{DS}}}$, ${dV_{\text{DS}}/dt}$, ${dI_{D}/dt}$, and ${I_{D}}$ is within ${2\%}$, ${5\%}$, ${9\%}$, and ${6\%}$. In addition, the fastest transition time of the state variables is only ${\text{13}\,\text{ns}}$. In summary, this design provides an engineering reference and theoretical basis for the implementation of a digital feedback active gate driver.

The GaN-based active rectifiers have the potential to improve the efficiency of the several megahertz wireless power transfer system (WPTS). The full-bridge active rectifier can eliminate extra dc–dc converters for output regulation with less voltage stress than resonant rectifiers, such as Class E, Φ rectifiers. However, the lack of the synchronous phase control method is the core challenge for full-bridge active rectifier in 6.78-MHz WPTSs. Meanwhile, the increasing switching losses and reverse conduction losses of the gallium nitride high electron mobility transistors are the main constraints on the efficiency of the system. This article proposes an adaptive synchronous driving phase control (ASDPC) method of the GaN-based full-bridge rectifiers in 6.78-MHz WPTS. With the proposed method, the full-bridge rectifier can obtain the maximum output power in the critical zero voltage switching operation over a wide load range. A 50-W 6.78-MHz WPTS is built to verify the effectiveness and stability of the proposed ASDPC method. The dc–dc efficiency is improved in the wide load range of 8–50 Ω (11.8–54.57 W) and reaches 87.18% at Po = 44.9 W. Compared to the system without ASDPC, the efficiency can be improved by 5.2% at light load and 3.1% at heavy load.

The power electronic transformer (PET) based on a cascade connection of modular multilevel converter (MMC) submodules with dual active bridges (DAB) is a promising topology for future hybrid ac/dc distribution grids. The voltage ripple suppression is of great importance for the power density improvement of this topology. However, traditional voltage ripple control strategies suffer from steady-state errors, couplings among different control loops, and considerable extra power loss. This article presents a comprehensive closed-loop voltage ripple control scheme for the MMC-based PET based on ripple power transfer (RPT). First, a decoupled closed-loop voltage ripple control structure in dual rotating reference frames is derived, offering advantages including high steady-state accuracy and no coupling among different control loops. In addition, to minimize the extra power loss of DABs caused by RPT, an optimal operation strategy based on partial RPT and the corresponding control diagram that is convenient for real-time implementation are presented. Experimental results obtained from a scaled-down PET prototype demonstrate that the proposed voltage ripple control scheme can effectively reduce the steady-state error of the voltage ripple control, eliminate the couplings among different control loops, and improve the overall efficiency.