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There are mainly two factors responsible for rapidly escalating production test costs of today's RF and high-speed analog circuits: 1) the high cost of high-speed and RF automatic test equipments and 2) long test times required by elaborate performance tests. In this paper, we propose a low-cost signature test methodology for accelerated production testing of analog and RF integrated circuits. As opposed to prior work, the key contribution of this paper is a new test generation algorithm that directly tracks the ability of input test waveforms to predict the test specification values from the observed test response, even in the presence of measurement noise. The response of the device-under-test (DUT) is used as a 'signature' from which all of the performance specifications are predicted. The applied test stimulus is optimized in such a way that the error between the measured DUT performances and the predicted DUT performances is minimized. While existing low-cost test approaches have only been applied to low-and medium-frequency analog circuits, the proposed methodology extends low-cost signature testing to RF integrated circuits by incorporating modulation of a baseband test stimulus and subsequent demodulation of the obtained response to obtain the DUT signature. The proposed low-cost solution can be easily built into a load board that can be interfaced to an inexpensive tester. Index Terms--Analog circuits, frequency modulation, radio frequency (RF) amplifiers, self-testing, testing.

To maintain an acceptable level of quality in the production of analog-to-digital converters (ADCs), the linearity metrics of every ADC has to be measured and checked against performance specification limits. As ADCs continue to improve in resolution, their testing has becoming increasingly demanding in terms of test time. In this paper, we demonstrate a technique for reducing the test time for ADCs. The technique is shown to be significantly better than currently available techniques and can be easily integrated into current production test methodologies. Experimental results in simulation and on actual hardware are shown to demonstrate the technique. Index Terms--Analog-to-digital converter (ADC) linearity test, linear model, statistical modeling.