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This paper presents the design of wireless power transmission circuit on a small planar wide-band antenna. The proposed rectifying circuit consists of a microstrip line, a Schottky detector diode and a capacitor. Our proposed rectifying circuit can work at 2.45 GHz, 3.8 GHz and 5.8 GHz, namely, multiband operation, and circuit size is 56 mm × 43 mm × 1.6 mm. The proposed small planar wide-band antenna has a maximum gain of 1.26 dBi at 2.5 GHz, 0.37 dBi at 3.8 GHz and 3.32 dBi at 5.8 GHz. The maximum conversion efficiencies of this circuit achieved at free space are 26.8%, 29% and 43.3% at 2.5, 3.5 and 5.8 GHz with load resistances of 2000 Ω, 510 Ω, 1300 Ω and 0 dBm input power level. [ABSTRACT FROM PUBLISHER]

This paper presents a digitally controlled oscillator (DCO) in inductor-capacitor (LC) topology with dual -band and fine frequency tuning steps. Using special Fibonacci sequence method and additional capacitor in the capacitor bank, this DCO operates two differential frequency bands and achieves finer tuning range than that of a conventional binary sequence DCO. The proposed circuit is implemented in 0.18 um CMOS technology and tested. It has a high-band frequency of 4.01–4.54 GHz and low-band frequency of 3.41–3.74 GHz. The measured phase noise is −119.3 and −104.5 (dBc/Hz at 1MHz offset) at carrier frequency at 4.54 GHz and 3.41 GHz. [ABSTRACT FROM PUBLISHER]

A novel 14-bit digitally controlled ring oscillator is designed in 0.18 µm CMOS technology. Sub-feedback technique is used to increase the output frequency that produces stable oscillation with even number of stages. Frequency can be tuned from 674 MHz to 4 GHz. Phase noise at 4 GHz carrier frequency and 4 MHz offset is −119.4dBc/Hz. Figure of Merit (FoM) calculated is 156 dBc/Hz. [ABSTRACT FROM PUBLISHER]

This paper presents a digitally controlled oscillator (DCO) in Inductor-Capacitor (LC) topology with an enhanced frequency-steps and power consumption. Using special Fibonacci sequence method for optimizing capacitor sizes, this digitally-controlled oscillator (DCO) realizes frequency-tuning steps superior than a conventional DCO using binary sequence without increasing the power consumption. The proposed circuit is implemented in 0.18 um CMOS technology and tested. It has a center frequency of 7.9 GHz. The measured phase noise is −117.1 dBc/Hz(@1MHz offset) at carrier frequency of 7.7 GHz. [ABSTRACT FROM PUBLISHER]

A 14-bit digitally controlled ring oscillator (DCO) with operating frequency up to 1 GHz in 0.18 µm CMOS technology is designed. The design used digital control to obtain higher output voltage swing and to get lower flicker noise compared to the analog counterpart. To make the oscillator oscillate and to get stable quadrature output in the even number of stages, feed-forward technique is used. Designed DCO has tuning frequency range from 212 MHz to 1 GHz. Phase noise at 4 MHz frequency offset is −137.81 dBc/Hz. Figure of Merit (FoM) calculated as big as −162.25 dBc/Hz, an improvement of about 6 dB from the recently published result. [ABSTRACT FROM PUBLISHER]

This paper presents a design of 3.1–6.0 GHz power amplifier (PA) 0.18 µm CMOS technology for ultra-wideband (UWB) applications. The UWB PA employs two stages amplifier and inter-stage circuit to provide a wider gain and gain flatness while shunt resistive feedback technique is adopted at the input stage to provide wideband input matching. To obtain high and flat gain, good group delay variation and linearity at the same time, the inductive peaking technique and Class A PA are employed at the first stage and the second stage. The measurement results indicated that the proposed PA design has an average gain of 10±1 dB, an input return loss (S11) less than −6 dB, an output return loss (S22) less than −7 dB, and group delay variation of ±195.5 ps are obtained across the whole band. A good input 1dB compression point of −5 dBm and input third-order intercept point of 5 dBm at 5 GHz are achieved while consuming 30 mW power from 1.8 V supply voltage. [ABSTRACT FROM PUBLISHER]