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The findable, accessible, interoperable, and reusable (FAIR) data principles serve as a framework for examining, evaluating, and improving data sharing to advance scientific endeavors. There is an emerging trend to adapt these principles for machine learning models—algorithms that learn from data without specific coding—and, more generally, AI models, due to AI’s swiftly growing impact on scientific and engineering sectors. In this paper, we propose a practical definition of the FAIR principles for AI models and provide a template program for their adoption. We exemplify this strategy with an implementation from high-energy physics, where a graph neural network is employed to detect Higgs bosons decaying into two bottom quarks.

A new approach to categorize individual aerosol particles is developed. The method exploits the fractal dimensions of particle images obtained by computer-controlled scanning electron microscopy. It groups the particles into two classes, namely, fly ash and soil dust, depending on the morphological information provided by the shape of the particle. This enables particle sources to be more accurately identified especially in cases of similar chemical composition.

The article discusses research in computing architectures that take advantage of transistors that are increasingly smaller. Semiconductor transistor size has continued to decrease in accordance with Moore's law between 2002-2009, the article indicates. Also discussed are homogeneous multicore chips that have multiple copies of identical microprocessor design on the same silicon die.

We present a parallel implementation of an algorithm for calculating the two-point angular correlation function as applied in the field of computational cosmology. The algorithm has been specifically developed for a reconfigurable computer. Our implementation utilizes a microprocessor and two reconfigurable processors on a dual-MAP SRC-6 system. The two reconfigurable processors are used as two application-specific co-processors. Two independent computational kernels are simultaneously executed on the reconfigurable processors while data pre-fetching from disk and initial data pre-processing are executed on the microprocessor. The overall end-to-end algorithm execution speedup achieved by this implementation is over 90× as compared to a sequential implementation of the algorithm executed on a single 2.8 GHz Intel Xeon microprocessor. [ABSTRACT FROM AUTHOR]

The Cell Broadband Engine architecture is a revolutionary processor architecture well suited for many scientific codes. This paper reports on an effort to implement several traditional high-performance scientific computing applications on the Cell Broadband Engine processor, including molecular dynamics, quantum chromodynamics and quantum chemistry codes. The paper discusses data and code restructuring strategies necessary to adapt the applications to the intrinsic properties of the Cell processor and demonstrates performance improvements achieved on the Cell architecture. It concludes with the lessons learned and provides practical recommendations on optimization techniques that are believed to be most appropriate. [ABSTRACT FROM AUTHOR]

The article examines reconfigurable computing based on the combination of microcomputers and field programmable gate arrays (FPGA). This technology can now support the double precision, floating point operation that many scientific applications require. High performance reconfigurable supercomputing (HPRC) is a new technology for which SGI, Cray, and other companies have introduced commercial products.