38 results on '"Kumar, Annie"'
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2. (Invited) Integration of InP Heterojunction Bipolar Transistors on Silicon Substrates for 6G Networks
3. Back-End-of-Line-Compatible Fin-Gate ZnO Ferroelectric Field-Effect Transistors
4. First Demonstration of BEOL-Compatible 3D Fin-Gate Oxide Semiconductor Fe-FETs
5. Optical gain spectrum and confinement factor of a monolayer semiconductor in an ultrahigh quality cavity
6. Beol-Compatible Ingazno-Based Devices for 3D Integrated Circuits
7. Highly Scaled InGaZnO Ferroelectric Field-Effect Transistors and Ternary Content-Addressable Memory
8. Extremely Scaled Bottom Gate a-IGZO Transistors Using a Novel Patterning Technique Achieving Record High Gm of 479.5 μS/μm (VDS of 1 V) and fT of 18.3 GHz (VDS of 3 V)
9. First Demonstration of Fully CMOS-compatible Non-volatile Programmable Photonic Switch Enabled by Ferroelectric-SOI Waveguide for Next Generation Photonic Integrated Circuit
10. Temperature-Dependent Operation of InGaZnO Ferroelectric Thin-Film Transistors With a Metal-Ferroelectric-Metal-Insulator- Semiconductor Structure
11. Back-End-of-Line Compatible Fully Depleted CMOS Inverters Employing Ge p-FETs and α-InGaZnO n-FETs
12. Ge0.95Sn0.05 Gate-All-Around p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with Sub-3 nm Nanowire Width
13. Nanoscale metal-InGaAs contacts with ultra-low specific contact resistivity: Improved interfacial quality and extraction methodology.
14. Ge₀.₉₅Sn₀.₀₅ gate-all-around p-channel metal-oxide-semiconductor field-effect transistors with sub-3 nm nanowire width
15. Amorphous InGaZnO Thin-Film Transistors With Sub-10-nm Channel Thickness and Ultrascaled Channel Length
16. DIAGNOSTIC IMAGING IN TEMPOROMANDIBULAR JOINT DISORDERS - A REVIEW
17. Implementation of InGaAs-OI Passive Devices and Its Application to 5G Millimeter-Wave Phase Shifter
18. First Demonstration of Complementary FinFETs and Tunneling FinFETs Co-Integrated on a 200 mm GeSnOI Substrate: A Pathway towards Future Hybrid Nano-electronics Systems
19. Germanium-Tin (GeSn) P-Channel Fin Field-Effect Transistor Fabricated on a Novel GeSn-on-Insulator Substrate
20. Low Subthreshold Swing and High Mobility Amorphous Indium–Gallium–Zinc-Oxide Thin-Film Transistor With Thin HfO2 Gate Dielectric and Excellent Uniformity.
21. GeSn p-FinFETs with Sub-10 nm Fin Width Realized on a 200 mm GeSnOI Substrate: Lowest SS of 63 mV/decade, Highest Gm,int of 900 µS/µm, and High-Field µeff of 275 cm2/V•s
22. Enhanced Germanium-Tin P-Channel FinFET Performance using Post-Metal Anneal
23. Integration of InGaAs MOSFETs and GaAs/ AlGaAs lasers on Si Substrate for advanced opto-electronic integrated circuits (OEICs)
24. High mobility In0.30Ga0.70As MOSHEMTs on low threading dislocation density 200 mm Si substrates: A technology enabler towards heterogeneous integration of low noise and medium power amplifiers with Si CMOS
25. MOCVD Growth of High Quality InGaAs HEMT Layers on Large Scale Si Wafers for Heterogeneous Integration With Si CMOS
26. Heteroepitaxial growth of In In[subscript 0.30]Ga[subscript 0.70]As high-electron mobility transistor on 200 mm silicon substrate using metamorphic graded buffer
27. Enabling low power and high speed OEICs: First monolithic integration of InGaAs n-FETs and lasers on Si substrate
28. The first GeSn FinFET on a novel GeSnOI substrate achieving lowest S of 79 mV/decade and record high Gm, int of 807 μS/μm for GeSn P-FETs
29. Monolithic integration of InGaAs n-FETs and lasers on Ge substrate
30. Monolithic Integration of InAs Quantum-Well n-MOSFETs and Ultrathin Body Ge p-MOSFETs on a Si Substrate
31. Heteroepitaxial growth of In0.30Ga0.70As high-electron mobility transistor on 200 mm silicon substrate using metamorphic graded buffer
32. (Invited) Integration of InP Heterojunction Bipolar Transistors on Silicon Substrates for 6G Networks
33. Heteroepitaxial growth of In0.30Ga0.70As high-electron mobility transistor on 200 mm silicon substrate using metamorphic graded buffer.
34. (Invited) SiGe and III-V Materials and Devices: New HEMT and LED Elements in 0.18-Micron CMOS Process and Design
35. (Invited) Enabling Hetero-Integration of III-V and Ge-Based Transistors on Silicon with Ultra-Thin Buffers Formed by Interfacial Misfit Technique
36. Ge0.95Sn0.05Gate-All-Around p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with Sub-3 nm Nanowire Width
37. Non Infiltrating Angiolipoma of the Palate in Geriatric Patient: A Case Report with Review of Literature.
38. Ge 0.95 Sn 0.05 Gate-All-Around p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with Sub-3 nm Nanowire Width.
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