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We present a very compact hybrid detection module based on an advanced liquid-cooled low temperature cofired ceramic (LTCC) substrate. The double sided hybrid combines 144 photo detectors and four specialized flip chip readout ASICs (Application specific Integrated Circuits) used for the readout of scintillation crystals with application in time-of-flight positron emission tomography (PET) combined with magnetic resonance imaging (MRI). If MRI images and PET images are combined, completely new medical diagnostic and treatment prospects are feasible because the two techniques are complementary and they will offer both anatomical and functional information. One of the biggest challenges is the development of miniaturized detector modules that are highly functional and MRI compatible. Our SiPM (Silicon Photomultiplier) module has an area of 32.8 by 32.0 mm2 and contains 12 × 12 SiPMs in a pitch of 2.5 mm2. The SiPM readout of the 144 channels is performed by four PETA6 ASICs. The LTCC substrate with a 2.1 mm thickness has been manufactured using the most advanced technologies developed at Micro Systems Engineering GmbH To guarantee the manufacturability in serial or mass production, DP951 P2 green tape has been used. For the cooling channels, special technology has been developed by MSE. The liquid cooling channels inside the LTCC substrate provide excellent cooling for the ASICs, the SiPMs, and thermal insulation between ASICs and SiPMs and allow a very compact design of the detector modules, reducing their height by 50% compared with other technical solutions. We can insert a ring of our modules in an existing MR (Magnetic Resonance) scanner. Operating the SiPMs at low temperature improves their performance, reducing the effects of dark count rate and improving image quality. There is no heatsink, heat pipe, or other cooling element attached to the back side of the ASICs. To avoid interference between the PET and MRI system, short signal length is required for minimizing pickup loops and eddy currents. The 12 SiPM arrays with 2 × 6 geometry are wire bonded only at the edges of the SiPMs to the LTCC, enabling the use of nearly the whole detector area for photon detection, which is of paramount importance for excellent image quality. At the opposite side of the substrate, four ASICs with 272 μm bump pitch are flip chip solder assembled to the LTCC substrate including underfilling, and a few SMD (Surface Mount Device) components are mounted. A scintillator crystal array on top of the SiPMs converts gamma rays (511 keV photons produced from positron-electron annihilation) into light. We assume that the LTCC substrates and all components are fully MRI compatible, which is important for the integration of PET with MRI without mutual interference. The paper elucidates the impact of the used technology on the performance of advanced PET/MRI detector modules.

We present a very compact γ -detection module primarily designed for PET applications. On a total area of about 30 × 30 mm 2 , 144 SiPM photodetectors coupled to scintillator crystals are read out individually with fast timing ASICs. The core of the module is a LTCC ceramic substrate with internal water channels for efficient and stable liquid cooling. The top side of the LTCC is covered by 12×12 SiPMs in a regular pitch of 2.5 mm. The SiPMs are designed in the RGB-HD technology from FBK with a single cell size of 25 × 25 μ m 2 , very low dark-count rate and stable performance over a wide temperature range from 0 to 20 °C. The readout of the SiPMs is done with 4 specialized PETA5 ASICs flip-chip mounted to the bottom side of the substrate. Each chip has 36 readout channels (available in single or differential ended configuration) with self-triggered hit detection, a very low noise discriminator, signal amplitude integration and digitization, a TDC with 50 ps binwidth, neighbor logic and fast veto mechanisms. The full height of the assembly, including the connector to the main readout board, is less than 1 cm. In a 1:1 coupling configuration with 10 mm high LYSO scintillator arrays for detection of 511 keV gammas, the module has already reached 205 ps CRT time resolution (FWHM in coincidence between channels on two different modules), sufficient for ToF operation in PET. The module design, details on chip operation and latest results with LYSO arrays are described.

The purpose of this work is to evaluate the feasibility of room temperature wedge–wedge bonding using commercially available copper wires, coated with aluminum. Bonding quality, reliability and aging resistance of the wire bonds have been investigated using standard wire pull tests immediately after bonding and after accelerated life tests, including temperature storage at 125 °C, 150 °C, and 200 °C for up to 2000 h. Using focused ion beam (FIB-) preparation and high resolution electron microscopy (SEM, TEM combined with EDX X-ray analysis), results of microstructure investigations of the Al-coating/Cu wire interface as well as of the bonding interconnect formed between the coated wire and the metallization on ceramic substrate will be presented. These investigations provide background information regarding the binding mechanisms and material interactions, and contribute to assess and to avoid potential reliability risks. Due to the found advantageous bond processing behavior and increased reliability properties, our results indicate that room temperature wedge–wedge bonding of coated copper wires has a remarkable application potential, for instance in medical and other high reliability as well as high power applications. It combines all known advantages of usual copper bonding like excellent contacting behavior, high reliability and favorable material price with the possibility of processing temperature damageable components and considerable improved storage capability. Therefore, room temperature bonding using coated copper wire can also reduce cycle time, manufacturing and material costs.

Over the past five years, a great deal of work has been done to perform semiconductor die attach with AuSn alloys. Successful die attach has recently been achieved using Au and Sn multilayers evaporated onto the die or the host substrate. However, bonding techniques with thin (below 5 /spl mu/m) AuSn layers for very thin semiconductor devices have not yet been reported. The increasing demand for more advanced optoelectronic integrated circuits has created the need to bond materials having different lattice constants (e.g., GaAs on Si). In this paper we report a new way for the bonding of epitaxial liftoff (ELO) devices onto host substrates. Three of the multilayer structures investigated in this work produce a AuSn alloy bond with approximately 84 wt.% gold, but can be bonded with a peak temperature below 280/spl deg/C. The bonded samples were investigated with several standard surface analysis techniques: Optical microscopy, scanning electron microscopy (SEM), and energy dispersive X-ray analysis (EDX). We conclude that much thinner bonding layers can be attained than thus far reported. The results of our research allow us to optimize the layer structure and bonding parameters.