24 results on '"Witters, T"'
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2. Chemisorption of ALD precursors in and on porous low-k films
3. Forming gas anneal induced flat-band voltage shift of metal-oxide-semiconductor stacks and its link with hydrogen incorporation in metal gates
4. Properties of ALD HfTa xO y high- k layers deposited on chemical silicon oxide
5. Impact of H2/N2 annealing on interface defect densities in Si(100)/SiO2/HfO2/TiN gate stacks
6. Growth and Physical Properties of MOCVD-Deposited Hafnium Oxide Films and Their Properties on Silicon
7. Implementation of an industry compliant, 5×50μm, via-middle TSV technology on 300mm wafers.
8. A Dy2O3-capped HfO2 Dielectric and TaCx-based Metals Enabling Low-Vt Single-Metal-Single-Dielectric Gate Stack.
9. Low VT CMOS using doped Hf-based oxides, TaC-based Metals and Laser-only Anneal.
10. Interface passivation mechanisms in metal gated oxide capacitors.
11. Scalability of plasma enhanced atomic layer deposited ruthenium films for interconnect applications.
12. Interface stability in advanced high-κ-metal-gate stacks.
13. Nitrogen Profile and Dielectric Cap Layer (Al2O3, Dy2O3, La2O3) Engineering on Hf-Silicate.
14. Influence of metal capping layer on the work function of Mo gated metal-oxide semiconductor stacks.
15. Ternary rare-earth metal oxide high-k layers on silicon oxide.
16. Highly reliable TaOx ReRAM with centralized filament for 28-nm embedded application.
17. A novel CBRAM integration using subtractive dry-etching process of Cu enabling high-performance memory scaling down to 10nm node.
18. Role of the Ta scavenger electrode in the excellent switching control and reliability of a scalable low-current operated TiN\Ta2O5\Ta RRAM device.
19. Highly scalable effective work function engineering approach for multi-VT modulation of planar and FinFET-based RMG high-k last devices for (Sub-)22nm nodes.
20. Key sub 1nm EOT CMOS enabler by comprehensive PMOS design.
21. Novel process to pattern selectively dual dielectric capping layers using soft-mask only.
22. Strain enhanced low-VT CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delay.
23. Low VT metal-gate/high-k nMOSFETs — PBTI dependence and VT Tune-ability on La/Dy-capping layer locations and Laser annealing conditions.
24. Effects of interactions between HfO2 and poly-Si on MOSCAP and MOSFET electrical behavior.
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