Search

A simple passive capacitance model has been optimized to predict breakdown in a stacked SOI FET. Specifically, as the number of FETs in a switch increases, an equivalent increase in breakdown is not seen in hardware; instead, the breakdown performance saturates as the number of stacks in the FET increases. This phenomenon is not predicted by the FET foundry model. This work is focused on FETs for RF switches in flip chip topologies. As a result of this work, the different components that contribute to off-state capacitances were also described which is important for model development and accuracy.

In this paper, parallel plate varactor based phase shifter circuits using Barium Strontium Titanate (BST) thin films are presented. A cascade of 10, 15 and 20 parallel plate varactors were able to produce (150°, 258°, 297°), (218°, 381°,443°) and (227°, 402°, 464°) phase shift at (5, 10, 12 GHz) respectively. The 360° phase shift is achieved with small device size, low bias voltages (0-8 V), low leakage currents, low insertion loss and high figure of merit (FOM). FOM of 40, 33, 24 Degrees/dB is achieved with 10, 15 and 20 shunt varactors at 12 GHz respectively. The proposed circuit is very easy to fabricate which uses a CPW transmission line configuration and can be easily integrated with other circuits on chip.