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This study reappraises the optimum design parameters for the sequential power amplifier (SPA) when taking relative phase difference into account. By including the phase relationship between the main and peaking amplifiers, a modified efficiency formulation is derived that reveals the impacts of the key design parameters on the SPA efficiency at output power back-off. To optimise a wideband high-efficiency SPA design, a look-up table method is used to predict the required coupling ratio for a wideband directional coupler. To validate the design approach, a 1.5–2.4 GHz SPA is designed and measured, showing drain efficiency higher than 40% at 6 dB back-off across the band. When characterised using a 20 MHz long term evolution (LTE) signal and digital predistortion, the SPA shows good linearity with error vector magnitude

This letter presents the design of a broadband power amplifier (PA) that achieves, over the 0.45–3.4-GHz frequency band, an output power between 41.5 and 44.3 dBm and a power added efficiency (PAE) higher than 54%. A four-section transformer has been adopted as the output-matching network in order to target the impedance region defined by a simplified prediction of the power and efficiency contours. The designed PA can find application in flexible hardware for 5G applications, as well as in broadband radar and countermeasure systems.

The effects of the nonlinear drain-to-source capacitance ( $C_{\mathrm {DS}}$ ), or the varactor effect, on the operation of continuous-mode class-B/J power amplifiers (PAs) are described in terms of the mathematical analysis as well as experimental validation. The nonlinear $C_{\mathrm {DS}}$ generates harmonic current when the class-B/J drain voltage is applied across it, modifying the theoretical load trajectories on the Smith chart. This is shown to significantly deviate from the continuous-mode assertion of constant power and efficiency. A novel measurement approach called voltage–pull is used to investigate the effects of the second harmonic generation by the varactor in a class-B/J PA mode. Theoretical and experimental results showed the nonlinear $C_{\mathrm {DS}}$ degrades the drain efficiency compared to class-B on one half of the class-B/J design space while improving the other half due to the energy upconversion and downconversion, respectively. This paper provides an approach for die nonlinear characteristic optimizations for transistor manufacturers.

Envelope tracking is one of the promising technologies for 5G power amplifiers, providing high power efficiency over a wide output power range by modulating the supply voltage. Although the baseband impedance, the output impedance of the supply modulator, plays a crucial role in the linearity of the PA, it is often not measured or considered during the modulator design. This paper presents a new, simplified approach to characterising this impedance using a PA with a simple multi-tone modulation as a load. It describes the measurement setup and verifies the results by characterising the baseband impedance of a state-of-the-art buck converter and comparing this to its static model. The results demonstrate that multi-tone signals and complex modulations yield comparable results and are both suitable for measuring and modelling the baseband impedance. This shows that using simple multi-tone measurements and basic equipment, the full static impedance characteristic can be obtained.

An advanced active load-pull pulse profiling (ALPPP) system is presented to identify and track, for the first time, the optimum impedances along different sections of an RF pulse. Optimum impedance variations of a 10W GaN device within the RF pulse, and the resulting performance variations are quantified over an output power range of 25 dB showing a significant variation at power back-off. Furthermore, the nature of optimum load variations is probed through the addition of a pulsed IV capability. Pre-bias is utilized to investigate the impact of traps on device behavior over a range of temperature and drive power levels. It is demonstrated that pre-filling the traps provides for an almost constant load optimum across the RF pulse while maintaining device performance. Moreover, the identified optimum pre-bias condition, shows improved device linearity over the duration of the RF pulse, hence, suggesting a new method for compensating impedance mismatches and improving device linearity within an RF pulse.

This paper demonstrates the first realisation of a sequential power amplifier (SPA) with envelope tracking (ET). Composed of a 10 W main PA and a 23 W peaking PA, the 1.6–2.4 GHz SPA achieves more than 49% drain efficiency at 6 dB back-off across the band through modulating the main PA supply voltage. At 2 GHz, the ET SPA offers more than 45% efficiency at 10 dB back off. Moreover, the linearity of the ET SPA is measured with and without digital predistortion over the band. To the best of the authors’ knowledge, this work is the first investigation where ET has been applied to the SPA.

Envelope tracking power amplifiers (ET PAs) are one of the promising architectures to provide high efficiency amplification for future wireless communication systems. This is due to their ability to offer high efficiency over a wide output power range, by modulating the supply voltage applied to the PA. Generating this dynamic supply voltage with switching-mode modulators is highly efficient, but filtering the output remains a challenge, resulting in a residual ‘ripple’ on the supply voltage. This paper presents an experimental investigation into the interaction between a PA and a supply modulator in the presence of this ripple. By adding a varying ripple magnitude to the modulated drain voltage of a 2.14 GHz GaN ET PA with a 10 MHz LTE signal, the effects on the linearity of the RFPA can be observed and analysed to allow the system designer an insight into the amount of ripple that is tolerable, while still being able to achieve linearity and efficiency targets. The mixing products of the ripple and RF signal are shown to be a potential issue in ET PAs. This paper shows, for the first time, the full impact of the ripple voltage magnitude on the output spectrum. Further more, the ripple sensitivity of two different ET PA linearisation approaches are explored; firstly applying generic memory polynomial digital pre-distortion (DPD) and secondly optimising the ET tracking signal shaping function to improve linearity. Measurements show that for the case where the ripple and RF are not synchronized, neither approach is able to significantly mitigate the ripple effect on the PA linearity.

Envelope tracking power amplifiers (ET PAs) are one of the main contenders for high-efficiency PAs in future wireless communication systems. The importance of the input matching network (IMN) in GaN ET PAs is an under-explored topic. This paper explores the impact of the impedance presented to the gate of a transistor by the IMN on linearity, gain and efficiency. The impact is investigated by varying resistance and reactance of the source impedance with a fixed load over a wide range of supply voltages. Based on the results of this investigation, two IMNs are designed, one of which is optimised for maximum gain and the other for a good compromise between gain and linearity. Simulations show that the trade-off IMN achieves comparable power added efficiency (PAE) while the AM/PM distortion was reduced by more than 40%. The reduction in Q-factor of the input impedance is another advantage, possibly facilitating broadband matching. To verify these assumptions, a 2.9 GHz 10 W GaN RFPA was manufactured and measured. While measurements and simulations diverged to the degree expected from literature, they demonstrate that an input matching network can be used to optimise PAs for linearity in ET systems. A targeted IMN design can reduce phase and gain distortion effectively with little impact on efficiency, and additionally offers the possibility to further trade-off linearity and PAE.

Envelope tracking (ET) is a promising power amplifier (PA) architecture for current and future communications systems, which uses dynamic modulation of the supply voltage to provide high efficiency and potentially very wide bandwidth over a large dynamic range of output power. However, the dynamic nature of the supply voltage can lead to a problematic variation in transistor gain, particularly in GaN HEMTs. This paper describes and analyzes this behavior and the detrimental effect it can have on ET PAs. Contributing factors and origins of gain variation are described in detail along with how, for the first time, meaningful comparisons can be made between different devices. Using these guidelines, gain variation is shown to be a widespread issue effecting most GaN HEMTs presented in literature. To allow an analysis of the intrinsic device behavior, an extended transistor model is developed that takes the effect of gate and source field plates into account. This model is refined using measurement data and used to demonstrate the fact that the parasitic gate–drain capacitance ( $C_{\textrm {GD}}$ ) is the main contributor to the small-signal gain variation—a significant part of the overall gain variation. Based on this knowledge, possible strategies to reduce gain variation at the transistor technology level are proposed, allowing the optimization of GaN HEMTs specifically for ET PAs. One identified strategy involves reducing the length of the gate field plate and is shown to be a viable approach to reduce the gain variation in GaN HEMTs, albeit at an increased RF/dc dispersion.

This paper investigates the concurrent operation of a commercially available, modulated impedance synthesis and measurement system with digital pre-distortion (DPD) for industry standard modulated signals. The system was used to characterize a 10W GaN HEMT device, and provide impedance control over signal and distortion bandwidths, in response to a 10 MHz LTE signal centred at 2 GHz, and was able to rapidly achieve target reflection coefficients with an error less than −40dB (1%). A National Instruments (NI) PXi based characterisation system was used to apply a commercially available memory-based DPD algorithm. The transistor was biased in class-AB and was successfully linearised to better than −47.95 dBc ACPR when delivering at 2.5W average output power into an optimum load. Interestingly, the analysis showed that the DPD corrected ACPR contours aligned closely with the P 1dB contours, confirming the relevance of targeting peak-power for DPD, rather than raw ACPR. Also, and importantly, a level of linearity performance was achieved that meets for example, the 3GPP linearity specifications (45dBc) for commercial deployment, and demonstrates how this modulated load-pull system and DPD can be combined to de-risk an amplifier design at a very early stage in the design process.

This paper evaluates the applicability of pulsed I – V measurements as a tool for accurately extracting nonlinear gallium nitride (GaN)-based heterojunction field-effect transistor (HFET) models. Two wafers with the identical layer structure but different growth conditions have been investigated. A series of I – V measurements was performed under dc and pulsed conditions demonstrating a dramatic difference in the kink effect and current collapse (knee walkout) suggesting different trapping behaviors. However, when radio frequency (RF) I – V waveform measurements, utilizing active harmonic load–pull, were used to study the impact of these traps on the RF performance, both wafers gave good overall RF performance with no significant difference observed. This absence of correlation between pulsed I – V measurement results and RF performance raises a question about the applicability of pulsed I – V measurements alone as a tool for extracting nonlinear device models in the case of GaN HFETs.

This paper presents the formulation of a behavioral model for a gallium nitride (GaN) Doherty power amplifier (DPA) using long short-term memory (LSTM) networks. Implemented in TensorFlow, LSTM networks can construct the dynamic behavior with memory effects by learning the useful patterns in the time domain. The behavioral model is built using the measured in-phase and quadrature ($\boldsymbol {I}$/$\boldsymbol {Q}$) data of the DPA, under excitation by a 20-MHz LTE signal. A comparative study indicates that the LSTM model is capable of accurately capturing the AM/AM and AM/PM characteristics of the DPA, as well as achieving competitive accuracy when compared to Volterra-based models.

Envelope tracking power amplifiers (ET PAs) are one of the main contenders for future communication systems. Their operation over a wide range of supply voltages ($V_{\text{D}})$ leads to an extended set of requirements, this paper investigates a number of technologies, including Si LDMOS, GaAs pHEMT and GaN HEMT and how they behave in broadband ET PAs. The increased impact of the feedback capacitance $C_{\text{GD}}$ on broadband PA design in HEMT devices caused by a reduced $V_{\text{D}}$ is described for the first time. Analysis of the $V_{\text{D}}$ dependent characteristics show that GaN HEMTs can exhibit the most promising behaviour for broadband ET PAs due to their favourable output voltage dependent gain variationand their low capacitance to power ratio, so long as field plate designs are used to guarantee a favourable knee walkout.

This paper discusses, for the first time, the continuity\ud of optimum load for power and efficiency in saturated GaN\ud devices. Continuous modes are defined originally on the zerograzing\ud voltage assumption. In this paper we show that a\ud continuous behaviour can also be observed in saturated devices\ud without imposing any limitation on clipping. Simulations using a\ud simplified knee-model for the device and source-load pull experimental\ud characterization are critically analysed and compared to\ud describe the discovered continuum.

This paper investigates and compares the use of nonlinear test-set models for an effective and accurate operation of active load-pull systems. The results demonstrate a simple-to-implement and yet robust technique to align the generator and receiver reference plane with a minimum set of required measurements. With only 14 measurements a high agreement between target and measured load points was achieved with an average error less than 0.1 dB over a 70dB dynamic range. An increase in modeling complexity has therefore yielded no improvement. To compare the results, a behavioral model was employed, and it is shown that a high order of model complexity is required to achieve the same level of accuracy. The presented work provides, for the first time, a practical and effective method for the modeling of test-set nonlinearities, hence allowing a cost-effective implementation of active load-pull systems that operate power amplifiers within a gain compression region.

The CAD design of Power Amplifiers requires an accurate non-linear modelling solution. Generally, this is provided by state function (1-V, Q-V) model formulations. These typically require time consuming measurement procedures for model extraction and verification. Look-up table a-wave based behavioral models, i.e. the Cardiff Model, extracted directly from measurement data provide for a robust alternative, addressing both simulation accuracy and model extraction time. The challenge is identifying, in a time efficient manner, the appropriate load-pull impedance space, that ensures the model coefficients are accurately extracted. This paper outlines an automated approach addressing this requirement, that exploits the novel features of emerging high-speed load-pull measurement systems to identify and then measure directly load-pull power contours. The automated approach reduces significantly the number of required measurements, hence the measurement time, compared with the traditional approach while also ensuring an accurate Cardiff Model is extracted. The approach is demonstrated on a 10W packaged Cree HFET.

RF DC/DC converters typically treat power amplifier and rectifier separately. This paper presents a novel approach to designing converters based on the interaction between amplifier and rectifier. By utilising the second harmonic power generated in the rectifier to realise second harmonic injection to the power amplifier, both can be operated at high efficiency. This waveform engineering based concept is explored mathematically and then simulated. Based on this analysis, a class $\mathrm{B}^{*}$ rectifier based on a 0.25 $\mu \mathrm{m}6\mathrm{x}80\mu \mathrm{m}\mathrm{G}\mathrm{a}\mathrm{N}$ HEMT is measured using a load-pull/source-pull measurement system to emulate the required harmonic impedance environment. The resulting voltage and current waveforms are de-embedded to the intrinsic current generator plane and analysed, confirming the ability of this kind of rectifier to provide beneficial second harmonic injection to a power amplifier. The rectifier‘s efficiency is measured to be more than 90% over an input power range of 20 dB if the generated second harmonic is taken into account.

This paper discusses the analysis and the experimental results of a load modulated balanced amplifier designed for base-station applications. The hardware, employing commercially available GaN packaged devices, operates in the 1.7–2.5 GHz band, with maximum output power higher than 63 W, and with power added efficiency higher than 43% and 39% at 6 dB and 8 dB output power back-off, respectively. The analysis reveals that the proposed topology has some advantages when compared to other load modulated amplifiers, such as the Doherty, but on the other hand it shows an intrinsic non-linear behaviour. This is confirmed by experimental results, where it is shown that employing a non-linear splitting function between the two branches of the amplifier improves the performances with respect to a linear splitter. Moreover, through the adoption of a proper digital splitting function and predistortion it is possible to linearize the amplifier to a level acceptable for Long Term Evolution (LTE) base-stations while maintaining a competitive average efficiency.

Look-up table behavioral models (i.e. X-parameters, Cardiff model), input drive ‘|A 11 |’ referenced, extracted directly from measurement data, provide an accurate non-linear CAD modeling solution. Typically, formulated, like s-parameters, in the travelling wave (A-B) domain, since these waves can be directly measured and controlled in the high frequency domain. However, if formulated in the admittance (I-V) domain they would provide a more robust MMIC design modelling solution supporting the capability of width and frequency scaling. Presently, no technique has been presented that allows for the extraction of admittance behavioral models directly from load-pull measurements. Previous solutions have all involved complex indirect procedures based on using an extracted (A-B) domain behavioral model and CAD simulations using voltage sources. In this paper, a new extraction approach is presented which, by including the influence of variable ‘Vii’, allows for direct extraction of admittance behavioral models. This approach has been validated on GaN devices. Ministerio de Economía y Competitividad | Ref. TEC2014-60283-C3-3-R

info:eu-repo/grantAgreement/MINECO//TEC2014-60283-C3-3-R/ES/NUEVOS MODELOS NO LINEALES COMPORTAMENTALES DE TRANSISTORES Y TECNOLOGIAS DE DISEÑO PARA AMPLIFICADORES DE POTENCIA DE BANDA DUAL PARA DRONES MULTICOPTERO LIGEROS To meet state-of-the-art specs in nonlinear circuit design for high frequency transceivers, we need computational efficient and reliable active device nonlinear models. Frequencydomain behavioral formulations, like X-parameters, have proven successful in this context. In this paper these formulations are exploited, through simplifications and transformations to the admittance/impedance domains, to algebraically guide the complex nonlinear design flow, in particular, in oscillator design. In addition, analytically the transistor behavioral model bandwidth can be extended, through the enhanced frequency scalability provided by the admittance domain. Simulations and measurements, HEMT and HBT devices will be used to validate the described approaches. Ministerio de Economía y Competitividad | Ref. TEC2014-60283-C3-3-R

This paper presents the robust characterization of nonlinear microwave devices driven by broadband modulated multi-sine stimuli by using a refined multi-tone waveform measurement system. The substantial contribution comes from the capability of the measurement system to measure and average the time domain waveforms of adjacently modulated signals on a similar time scale for different modulation frequencies. The enhanced system demonstrates the ability of presenting the constant baseband (IF) loads across wide modulation bandwidth which is extremely imperative for the precise evaluation of inherent nonlinearity of microwave devices. The measurement system is later applied for the experimental investigations of baseband impedance variation effects on 10W GaN HEMT through the optimization scheme based on the simultaneously engineering of significant baseband components(IF1 and IF2) and higher baseband components(IF3 and IF4).

The intrinsic performance of the devices is of great meaning during power amplifiers design. A method to update de-embedding network at 5.8 GHz for packaged power devices is put forward based on physical modeling idea. The de-embedding network of a packaged GaN HEMT is presented and its errors are analyzed based on waveform engineering. The results may well lead to optimization of the de-embedding network.

This letter presents the design approach for a compact, single-stage, wideband MMIC power amplifier. A method is proposed to compensate for the output capacitance of the active device over a frequency range as wide as possible, with minimum impact on the achievable output power, which leads to a two-element compensating network. A three-section transformer is then adopted for a real-to-real transformation. The CW characterization shows the output power higher than 32 dBm and the drain efficiency between 35% and 45%, over a fractional bandwidth of 148%, from 3 to 20 GHz.

This paper presents a novel approach to incorporate gate bias voltage variations into the Cardiff behavioural model formulation. In particular, it is observed that the model coefficients can be expressed effectively as a linear function of bias voltage. As a result, the intensity of the load-pull measurement can decrease up to 80 % as the interpolation of the data with respect to the gate bias voltage can be exploited. The experiment was done on a 4 W GaN technology on-wafer device and the result is verified on 0.2 W GaAs technology device.