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LED is an extremely important energy-saving lighting products, which has greatly facilitated human life. Meanwhile, it also makes a positive contribution to global carbon neutrality and carbon peaking. Defect detection is a vital part of the production process to control the quality of LED chips. The traditional methods use a microscope for manual visual inspection, which is time-consuming and has inconsistent testing standards, low efficiency, and other deficiencies. To solve these problems, a hybrid algorithm based on geometric computation and a convolutional neural network is proposed for LED chip defect detection. The method takes advantage of the dimensionality reduction of geometric computation to perform coarse detection of defects on preprocessed chip lithography graphs in the form of grid segmentation, which realizes fast coarse screening of large-scale chip samples and reduces postcomputational costs. The convolutional neural network model is used for the secondary fine detection of "suspected defective" chips after geometric coarse screening, and the SPP (spatial pyramid pooling) network model is improved by directly introducing the original feature map into the SPP pooling layer for summation to enhance the global and local feature information of the output feature map. Furthermore, we construct an LED chip image acquisition platform using a high-frequency multimagnification zoom lens, collect training samples of defective chips, and increase the number of samples through image processing techniques. The research introduces the R-CNN, SDD, and YOLO methods to evaluate the superiority of our method in a number of experiments. The experimental results show that our algorithm proposed in this paper has an average precision (AP) of 96.7% for large-scale chip detection with a low defect rate. Compared with other methods, the testing mean average precision (mAP) is 10.39% higher than traditional YOLO v2. The testing mIoU is also 3.63% higher than traditional YOLO v5, the detection speed is also significantly improved, and it has good robustness. [ABSTRACT FROM AUTHOR]

The two-dimensional graphical nesting problem is widespread in industrial production and is an NP-complete problem. The core technology of various nesting methods is the graphical collision algorithm. In this paper, a general algorithm for geometric graphics is proposed. According to the geometrical characteristics of the packed parts, the idea of divide and conquer is adopted, and the corresponding collision strategies are designed, respectively. Two-point bidirectional collision calculation, aligned bidirectional collision and slipping calculation are proposed to determine the collision relationship between graphics. The interpolation strategy is used to reduce the computation of NFP (No-Fit-Polygon). The precise interpolation between graphics is achieved by first marking and positioning, and then sliding interpolation in both directions, which improves the interpolation efficiency. Finally, the results of the comparison test by several cases of different types show that the algorithm is effective, stable, reliable and adaptable. [ABSTRACT FROM AUTHOR]

The packing for two-dimensional irregular graphics is one of the NP-complete problems and widely used in industrial applications. In this paper, a descending nesting algorithm for a two-dimensional irregular graph based on geometric feature points is proposed. Before the packing, the parts to be packed are sorted, matched, and spliced, and the matching of the rectangular pieces and the rectangular-like pieces is carried out according to the plate size. On this basis, the geometric feature points of the parts are used to construct the packing baseline, and the packing is accurately carried out according to the principles of the bottom left, the principle of the lowest center of gravity, and combination with virtual moving, rotating collision calculation. The computation of the moving collision distance between the graphics is replaced by the projecting computation of the geometric feature points of the graphic parts, so the computation amount can be reduced. Also, this method is used to test a number of benchmarks examples which are provided by ESICUP (EURO Special Interest Group on Cutting and Packing), which show that the proposed algorithm not only can improve packing but also has better stability and reliability. [ABSTRACT FROM AUTHOR]