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Repetitive controllers (RCs) are linear control structures based on the internal model principle. This control strategy is known for its ability to control periodic reference signals, even if these signals have many harmonic components. Despite being a solution that results in a good performance, several parameters of the repetitive controller need to be correctly tuned to guarantee its stability. Among these parameters, one that has high impact on the system performance and stability is the finite impulse response (FIR) filter, which is usually used to increase the stability domain of RC-based controllers. In this context, this paper presents a complete tutorial for designing the zero-phase FIR filter, which is often used to stabilize control systems that use RC-based controllers. In addition, this paper presents a Matlab® application developed for performing the stability analysis of RC systems and designing its FIR filter. Simulation and experimental results of a shunt active power filter are used to validate the algorithm and the Matlab® application. [ABSTRACT FROM AUTHOR]

Fundamental-frequency and harmonic positive- and negative-sequence components detection is an important task for implementing power converters for renewable energy systems, uninterruptible power supplies, active power filters, dynamic voltage restorers, and also for power systems protection relays. Detection techniques of this kind are generally implemented in digital signal processor (DSP) with the execution time limited by the sampling period. The computational effort of the control algorithm can considerably increase the execution time, due to the sequential nature of processing in DSP. A promising technique for sequence components separation of three-phase signals is the so called the generalized delayed signal cancelation—phase locked loop (GDSC-PLL). Field programmable gate array's (FPGA's) capacity of exploring the parallelism of operations present in the GDSC-PLL is demonstrated in this paper through the mapping of this technique directly in hardware, allowing for a much shorter execution time than in DSP. The proposed architecture is presented, and the efficient detection of the fundamental-frequency positive-sequence with FPGA is demonstrated, with the obtained results compared with a traditional DSP implementation. In particular, the advantages and possibilities of the use of FPGA are demonstrated in comparison with the DSP. For this comparison, a metric for evaluating the capacity of complexity increase in application algorithms is proposed. [ABSTRACT FROM PUBLISHER]

Abstract-This paper presents a modulation technique based on the generalized pulsewidth-modulation strategy for matrix converters. The proposed technique uses a discontinuous modulation to clamp each output leg of the converter during 1200 of the output voltage period, achieving a reduced number of switchings compared with the traditional modulation techniques. Aside from that, the major attraction of the proposed technique is an additional algorithm that lags the clamping of each output leg of the converter to synchronize it with the peak of the corresponding output current (load current), avoiding high switching losses (switching at high currents). Therefore, this technique reduces the number of switchings as well as guarantees only medium and low current switchings. Simulation and experimental results show the efficiency of the proposed technique. [ABSTRACT FROM AUTHOR]

A stator field oriented control scheme for induction motor drives is proposed. As a deadbeat controller, the algorithm calculates the voltage vector to be supplied by the frequency converter in order to eliminate the flux and torque errors each switching period. The strategy is a DTC scheme in the sense that there are no current controllers with the advantage of a fixed switching frequency. Simulation and experimental results are presented to show the effectiveness of the proposed method and the quality of torque and flux transient responses. [ABSTRACT FROM AUTHOR]