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Al2O3/ZrO2 (A/Z) layers with embedded Pt nanoparticles (Pt-nps) at the interface of A/Z have been used to create a dielectric film with an enhanced permittivity. The Pt-nps and dielectrics are both grown by the atomic layer deposition process, which is complementary metal–oxide–semiconductor compatible. In order to control the thickness ratio of Pt-nps in the overall dielectrics more easily, the thickness of the ZrO2 layer is changed from 12 to 30 nm with a fixed thickness of 12 nm for Al2O3 and constant growth cycles of 70 for Pt-nps. The results show that the introduction of Pt-nps is beneficial to the enhancement of the dielectric permittivity. As the thickness of ZrO2 is 30 nm, the capacitance density increases from 2.5 to 5.1 fF/μm2 with the addition of Pt-nps, i.e., a doubling of the capacitance density achieved. Additionally, the leakage current at 2 V increases from 1.1 × 10−8 to 1.5 × 10−7 A/cm2. Furthermore, the dielectric breakdown field decreases from 5.4 to 2.7 MV/cm. The electric field distribution simulation and charging–discharging test imply that interfacial polarization is built at the interface of Pt-nps and the dielectric films, which contributes to the dielectric permittivity enhancement, and local electric field increasing in the affinity of Pt-nps gives rise to the deterioration of the leakage current and breakdown electric field. [ABSTRACT FROM AUTHOR]

Sn-doped indium oxide (ITO) semiconductor nano-films are fabricated by plasma-enhanced atomic layer deposition using trimethylindium (TMIn), tetrakis(dimethylamino)tin (TDMASn), and O2 plasma as the sources of In, Sn and O, respectively. A shared temperature window of 150 °C– 200 °C is observed for the deposition of ITO nano-films. The introduction of Sn into indium oxide is found to increase the concentration of oxygen into the ITO films and inhibit crystallization. Furthermore, two oxidation states are observed for In and Sn, respectively. With the increment of interfaces of In–O/Sn–O in the ITO films, the relative percentage of In3+ ions increases and that of Sn4+ decreases, which is generated by interfacial competing reactions. By optimizing the channel component, the In0.77Sn0.23O1.11 thin-film transistors (TFTs) demonstrate high performance, including μ FE of 52.7 cm2 V−1 s−1, and a high I ON/ I OFF of ∼5 × 109. Moreover, the devices show excellent positive bias temperature stress stability at 3 MV cm−1 and 85 °C, i.e. a minimal V th shift of 0.017 V after 4 ks stress. This work highlights the successful application of ITO semiconductor nano-films by ALD for TFTs. [ABSTRACT FROM AUTHOR]

Concurrently achieving high energy storage density (ESD) and efficiency has always been a big challenge for electrostatic energy storage capacitors. In this study, we successfully fabricate high-performance energy storage capacitors by using antiferroelectric (AFE) Al-doped Hf0.25Zr0.75O2 (HfZrO:Al) dielectrics together with an ultrathin (1 nm) Hf0.5Zr0.5O2 underlying layer. By optimizing the Al concentration in the AFE layer with the help of accurate controllability of the atomic layer deposition technique, an ultrahigh ESD of 81.4 J cm−3 and a perfect energy storage efficiency (ESE) of 82.9% are simultaneously achieved for the first time in the case of the Al/(Hf + Zr) ratio of 1/16. Meanwhile, both the ESD and ESE exhibit excellent electric field cycling endurance within 109 cycles under 5~5.5 MV cm−1, and robust thermal stability up to 200 °C. Thus, the fabricated capacitor is very promising for on-chip energy storage applications due to favorable integratability with the standard complementary metal–oxide–semiconductor (CMOS) process. [ABSTRACT FROM AUTHOR]

Ferroelectric field effect transistor (FeFET) memories with hafnium zirconium oxide (HZO) ferroelectric gate dielectric and ultrathin InO x channel exhibit promising applicability in monolithic three-dimensional (M3D) integrated chips. However, the inferior stability of the devices severely limits their applications. In this work, we studied the effect of single cycle of atomic-layer-deposited Al–O bonds repeatedly embedded into an ultrathin InO x channel (∼2.8 nm) on the Hf0.45Zr0.55O x FeFET memory performance. Compared to the pure InO x channel, three cycles of Al–O bonds modified InO x channel (IAO-3) generates a much larger memory window (i.e. drain current ratio between the programmed and erased devices) under the same program conditions (+5.5 V/500 ns), especially after post-annealing at 325 °C for 180 s in O2 (1238 versus 317). Meanwhile, the annealed IAO-3 FeFET memory also shows quite stable data retention up to 104 s, and much more robust program/erase stabilities till 105 cycles. This is because the modification of strong Al–O bonds stabilizes the oxygen vacancies and reduces the bulk trap density in the channel. Furthermore, it is indicated that the program and erase efficiencies increase gradually with reducing the channel length of the memory device. By demonstrating markedly improved performance of the HZO FeFET memory with the ultrathin IAO-3 channel, this work provides a promising device for M3D integratable logic and memory convergent systems. [ABSTRACT FROM AUTHOR]

The ferroelectricity of Zr-doped HfO2 (HZO) thin films induced by low thermal budget annealing provides great potential to implement the ferroelectric functionalities into the back end of line (BEOL) process of the standard CMOS integrated circuits. However, most of previous works need high temperature annealing or long time annealing to acquire ferroelectricity. In this work, both annealing temperature and time are optimized to achieve optimal ferroelectricity of Hf0.45Zr0.55Ox films produced by thermal atomic layer deposition (TALD) and plasma-enhanced atomic layer deposition (PEALD). The results indicate that the TALD and PEALD films exhibit maximum double remanent polarization ($2{P}_{r}$) of ~36.8 and ~ $30.0 {{ \boldsymbol {\mu }}}\text{C}/$ cm2, respectively, after annealing at 330 °C for 300 s. Furthermore, the characteristics of the above annealed films are comprehensively compared. It is found that the PEALD film exhibits a higher maximum-dielectric-constant, a higher breakdown electric field, and better endurance against switching cycles than the TALD one, but more severe wake-up effects. This is ascribed to the factor that the PEALD film contains more tetragonal phase and less defects than the TALD one. In this article, the PEALD film has moderate ${P}_{r}$ and robust endurance, which is more promising for memory devices. [ABSTRACT FROM AUTHOR]

A neuromorphic electronic system requires the component devices to not only mimic typical synaptic behaviors but also be energy-efficient, together with excellent uniformity and tunable memory time. For this purpose, we fabricated amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors with plasma-enhanced atomic layer deposition AlOx:H dielectrics, successfully demonstrating typical synaptic behaviors, such as excitatory and inhibitory postsynaptic current, pair-pules facilitation, dynamic filter, learning and forgetting abilities and spike-timing dependent plasticity. In particular, such synaptic transistors exhibit ultralow energy consumption down to 3.18 fJ per synaptic event and tunable extensive memory time ranging from 76.6 ms to at least thousands of seconds. The ultralow energy consumption is realized by electron trapping and releasing at and near the interface between a-IGZO channel and AlOx:H dielectric under low voltages. By adjusting the concentration of oxygen vacancy defects in the a-IGZO domain adjacent to the interface by means of changing the growth temperature of the AlOx:H dielectrics, the memory time of the device can be further tuned on a large scale. Device flexibility was also demonstrated by fabricating the synaptic transistors onto polymer substrates at room temperature. [ABSTRACT FROM AUTHOR]

Electrical characteristics of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) are compared by using O2 plasma-enhanced atomic layer deposition Al2O3 dielectrics at different temperatures. High-performance a-IGZO TFTs are demonstrated successfully with an Al2O3 dielectric deposited at room temperature, which exhibit a high field-effect mobility of 19.5 cm2 V− 1 s− 1, a small subthreshold swing of 160 mV/dec, a low threshold voltage of 0.1 V, a large on/off current ratio of 4.5 × 108, and superior negative and positive gate bias stabilities. This is attributed to the hydrogen-rich Al2O3 dielectric deposited at room temperature in comparison with higher deposition temperatures, thus efficiently passivating the interfacial states of a-IGZO/Al2O3 and the oxygen vacancies and improving conductivity of the a-IGZO channel by generating additional electrons because of enhanced hydrogen doping during sputtering of IGZO. Such an extremely low thermal budget for high-performance a-IGZO TFTs is very attractive for flexible electronic application. [ABSTRACT FROM AUTHOR]

For advanced Cu interconnect technology, Co films have been widely investigated to serve as the liner and seed layer replacement because of a better wettability to Cu than Ta. In this article, the Co films are grown by plasma-enhanced atomic layer deposition using Co(EtCp)2 as a precursor, and the influences of process parameters on the characteristics of the Co films are elaborately investigated. The results indicate that the process window is 125-225 °C with a growth rate of ~ 0.073 Å/cycle. That is to say, the connection of Et group to Cp ligand can enable a stable film growth at 125 °C, while the corresponding temperature must be higher than 200 °C in terms of Co(Cp)2 and Co(MeCp)2. The deposited films contain N and O elements besides dominant Co and C. Furthermore, the prolongation of the NH3 pulse time significantly enhances the conductivity of the Co film and a low resistivity of 117 μΩ cm can be achieved with a NH3 pulse time of 40 s. The root mean square roughness shows a smaller variation with the deposition temperature and maintains a low value of ~ 0.3 nm, indicative of a flat Co film. [ABSTRACT FROM AUTHOR]

For metal-insulator-metal (MIM) capacitors applicated in the fields of RF, DRAM, and analog/mixed-signal integrated circuits, a high capacitance density is imperative with the downscaling of the device feature size. In this work, the microwave annealing technique is investigated to enhance the dielectric characteristics of Al2O3/ZrO2/Al2O3 based MIM capacitors. The results show that the permittivity of ZrO2 is increased to 41.9 (~ 40% enhanced) with a microwave annealing at 1400 W for 5 min. The substrate temperature is lower than 400 °C, which is compatible with the back end of line process. The leakage current densities are 1.23 × 10−8 and 1.36 × 10−8 A/cm2 for as-deposited sample and 1400 W sample, respectively, indicating that the leakage property is not deteriorated. The conduction mechanism is confirmed as field-assisted tunneling. [ABSTRACT FROM AUTHOR]