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The algorithm complexity of model predictive control (MPC) for cascaded H-bridge (CHB) static synchronous compensators (STATCOMs) was optimized to a polynomial level in previous studies. However, implementing MPC with conventional approaches still suffers from long execution time, where a low cost digital signal processor (DSP) is used to execute optimization algorithms and a small-sized field-programmable gate array (FPGA) is used to extend gate signals and sampling functions. This paper presents a parallel implementation approach to reduce the execution time of MPC, where the FPGA is configured to be used for accelerating the high-complexity sorting tasks. By running the DSP and FPGA in parallel, the algorithm execution time is only determined by the DSP, and the resource consumption is only determined by the FPGA. To minimize the resource consumption and requirement in FPGA, a parallel comparison-based sorter with multiple comparison and accumulators is proposed. The proposed implementation method can reduce the time and space complexity of the MPC from the polynomial level to a linear level without additional hardware cost, which means the MPC for medium-voltage CHB STATCOMs (e.g., 20 stages) can be implemented online with existing control platforms. Experimental results for various CHB STATCOMs are presented to validate the proposed configuration and algorithm. [ABSTRACT FROM AUTHOR]

Applying model predictive control (MPC) to cascaded H-bridge multilevel converters, while improving the dynamic performance, suffers from high computation burden due to substantial voltage vectors and switching combinations. In this paper, a simplified branch and bound approach is proposed to reduce the computation of the MPC for a cascaded H-bridge Static Synchronous Compensator (STATCOM). The underlying optimization problem of the current predictive control is a two-variable integer quadratic programming problem. With the proposed approach, the global optimal voltage vector can be selected within linear time instead of polynomial time. This is achieved by selecting the possible values of one variable as the branch, and enumerating the optimal integer results of each branch. The execution time of the proposed approach and conventional methods are compared to demonstrate the effectiveness of the proposed approach. Simulation and experimental results for a seven-level cascaded H-bridge STATCOM system are presented to verify the usability and reliability of the proposed approach. [ABSTRACT FROM PUBLISHER]

To solve the issue of exponentially increasing computational burden of finite control set model predictive control (FCS-MPC) for multilevel converters, a fast MPC scheme for multilevel cascaded H-bridge STATCOM is presented. The proposed approach consists of three steps. First, with the partially stratified optimization approach, the multiobjective programming of MPC is divided into two suboptimization problems, i.e., current-control MPC and voltage-balancing MPC. Second, a dynamic programming algorithm is proposed for the optimization of current-control MPC. Third, a mixed algorithm, which combines dynamic programming and greedy algorithm (0-1 programing), is proposed to select the optimal switching combination from all the redundant switching combinations for the voltage balancing MPC achieving a global optimization. Through the analysis of the time complexity, with the proposed scheme, the total computation of FCS-MPC can be reduced to polynomial time from exponential time. The proposed approaches will not deteriorate the control performance. The control performance is validated by simulation results and the effectiveness is further demonstrated by implementing the algorithm on a low-cost DSP (TMS320F28335) in real time. [ABSTRACT FROM PUBLISHER]