Search

A low-power 3-9 GHz receiver front-end with excellent stop-band rejection by 0.18 µm CMOS technology is demonstrated. High stop-band rejection is achieved by using a pre-filter with three finite-transmission zeros, one of which (ωz1=0.9 GHz) is in the low-frequency stop-band and the other two (ωz2 and ωz4) are in the high-frequency stop-band. In the low-gain (LG) mode, the receiver front-end consumes 9.45 mW and achieves high and flat conversion gain (CG) of 25.7±1.5 dB, noise figure (NF) of 6.95 dB, and input third-order intercept point (IIP3) of -8 dBm. To the author's knowledge, this is the lowest-power dissipation (PD) ever reported for a 0.18 mm CMOS receiver front-end with NF smaller than 7 dB, average CG greater than 25 dB and bandwidth wider than or equal to 6 GHz. In the high-gain (HG) mode, the receiver front-end consumes 19.5 mW and achieves high and flat CG of 32.7±1.6 dB, NF of 6.78 dB and IIP3 of -13.5 dBm. In addition, in both the LG and HG modes, the receiver front-end achieves stop-band rejection better than 30 dB for frequencies DC∼1.5 GHz and larger than 12 GHz. [ABSTRACT FROM AUTHOR]

A DC∼10.5 GHz complimentary metal oxide semiconductor (CMOS) distributed amplifier (DA) with flat and low noise figure (NF), flat and high power gain (S21) and small group delay (GD) variation for ultra-wideband (UWB) pulse radio systems using standard 0.18 µm CMOS technology is demonstrated. Flat and low NF was achieved by adopting the proposed resistor capacitor (RC) terminal network with 140 Ω terminal resistance over the frequency band of interest (instead of the traditional 50 Ω terminal resistance or the recently proposed resistor inductor (RL) terminal network) for the gate transmission line. Besides, flat and high S21 was achieved by using cascoded transistors as the gain cell. Over the DC∼10.5 GHz band, the DA consumed 29.16 mW and achieved flat and high |S21| of 10.5±1.4 dB, flat and low NF of 3.2±0.3 dB and excellent phase linearity (the GD variation was only ±13.8 ps), one of the best NF and phase linearity results ever reported for a CMOS DA or wideband low-noise amplifier (LNA) with bandwidth greater than 7.5 GHz. [ABSTRACT FROM AUTHOR]

A 21–27 GHz CMOS ultra-wideband low-noise amplifier (UWB LNA) with state-of-the-art phase linearity property (group delay variation is only ±8.1 ps across the whole band) is reported for the first time. To achieve high and flat gain (S21) and small group delay variation at the same time, the inductive series peaking technique was adopted in the output of each stage for bandwidth enhancement. The LNA dissipated 27 mW power and achieved input return loss (S11) of -13 to -20.1 dB, output return loss (S22) of -8.2 to -30.2 dB, flat S21 of 9.3±1.3 dB, reverse isolation (S12) of -52.7 to -73.3 dB, and noise figure of 4.9–6.1 dB over the 21–27 GHz band of interest. The measured 1 dB compression point (P1 dB) and input third-order intermodulation point (IIP3) were -14 and -4 dBm, respectively, at 24 GHz. [ABSTRACT FROM AUTHOR]

A 3.1–10.6 GHz ultra-wideband low-noise amplifier (UWB LNA) with excellent phase linearity property (group-delay variation is only ±16.7 ps across the whole band) using standard 0.13 µm CMOS technology is reported. To achieve high and flat gain and small group-delay variation at the same time, the inductive peaking technique is adopted in the output stage for bandwidth enhancement. The UWB LNA achieved input return loss (S11) of -17.5 to -33.6 dB, output return loss (S22) of -14.4 to -16.3 dB, flat forward gain (S21) of 7.92±0.23 dB, and reverse isolation (S12) of -25.8 to -41.9 dB over the 3.1–10.6 GHz band of interest. A state-of-the-art noise figure (NF) of 2.5 dB was achieved at 10.5 GHz. [ABSTRACT FROM AUTHOR]

A low-power 3.2-9.7 GHz ultra-wideband low-noise amplifier (UWB LNA) with excellent stop-band rejection by 0.18 µm CMOS technology is demonstrated. High stop-band rejection is achieved by using a passive bandpass filter (BP-filter) with three finite transmission zeros (in the input terminal), one of which (ωz1=0.9 GHz) is in the low-frequency stop-band and the other two (ωz3 and ωz5) are in the high-frequency stop-band. In addition, an active notch filter is used in the output terminal to introduce another low-frequency stop-band transmission zero (ωz2) at 2.4 GHz. The LNA consumes 4.68 mW and achieves S11 of -10 to -39.5 dB, S21 of 9.3±1.5 dB, and an average NF of 6 dB over the 3.2-9.7 GHz band. The measured stop-band rejection is better than 21.6 dB for frequencies DC-2.5 and 11.2-20 GHz. [ABSTRACT FROM AUTHOR]

A low-power 3-10 GHz common-gate CMOS ultra-wideband (UWB) low-noise amplifier (LNA) using a T-match input network and the self-body-bias technique is demonstrated. Wideband input impedance matching was achieved by using the proposed T-match input network to improve the input matching at low frequencies. A low supply voltage of 1.1 V (for two VDS drops) was achieved by using the self-body-bias technique to reduce the threshold voltage (Vth) of the transistors, which leads to a low power consumption (PD). At VG=0.77 V, the LNA consumed 2.15 mW and achieved S11 of -10.4 to -35.5 dB, S21 of 10.4 dB, and an average NF of 4.9 dB over the 3-10 GHz band of interest. At VG=0.63 V, the LNA consumed 0.99 mW and achieved S11 of -10.7 to -35.8 dB, S21 of 7.9 dB and an average NF of 6 dB. Both are the lowest PD ever reported for an UWB CMOS LNA with bandwidth greater than 6 GHz. [ABSTRACT FROM AUTHOR]

A 20-29 GHz CMOS ultra-wideband (UWB) low-noise amplifier (LNA) with excellent input return loss (S11), flat and high power gain (S21), and flat and low noise figure (NF) is demonstrated. Wideband input impedance matching was achieved by using the proposed T-match input network to generate two S11 dips. Flat and high S21 was achieved because the inductive-peaking second stage and the current-reused final two stages can compensate the gain degradation of the source-degenerative first stage at medium and high frequencies, respectively. Flat and low NF was achieved by adopting a slightly under-damped Q-factor for the second-order NF frequency response. The LNA consumed 22.07 mW and achieved S11 of -15.5 to -26.8 dB, S21 of 16.2±2.5 dB, minimum NF (NFmin) of 3.1 dB (at 20 GHz), and an average NF of 3.6 dB over the 20-29 GHz band of interest, one of the best reported average NF performances for a 24 GHz band CMOS LNA with bandwidth wider than 6 GHz in the literature. [ABSTRACT FROM AUTHOR]

A 3.1–10.6 GHz ultra-wideband low-noise amplifier (UWB LNA) with excellent phase linearity property (group-delay-variation is only ±17.4 ps across the whole band) using standard 0.18 µm CMOS technology is reported. To achieve high and flat gain and small group-delay-variation at the same time, the inductive peaking technique is adopted in the output stage for bandwidth enhancement. The UWB LNA dissipates 22.7 mW power and achieves input return loss (S11) of -9.7 to -19.9 dB, output return loss (S22) of -8.4 to -22.5 dB, flat forward gain (S21) 11.4±0.4 dB, reverse isolation (S12) of -40 to -48 dB, and noise figure of 4.12–5.16 dB over the 3.1–10.6 GHz band of interest. A good 1 dB compression point (P1 dB) of -7.86 dBm and an input third-order intermodulation point (IIP3) of 0.72 dBm are achieved at 6.4 GHz. The chip area is only 681×657 µm excluding the test pads. [ABSTRACT FROM AUTHOR]

A K-band second-order bandpass filter with planar inductive π-network using CMOS technology is demonstrated for the first time. To reduce the substrate loss of the filter, the CMOS process compatible backside inductively-coupled-plasma (ICP) deep trench technology is used to selectively remove the silicon underneath the filter. After the ICP etching, a 55.5–92.2% improvement in quality factor is achieved for the inductors in the filter. In addition, a 1.1 dB improvement in maximum available power gain (GAmax) in K-band is achieved for the filter after the ICP etching. These results show that the micromachined π (PI) filter is very promising for microwave/millimetre-wave RFIC applications. [ABSTRACT FROM AUTHOR]