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Due to the raising requirements of functionality and performance in consumer electronics, high density package technology including high I/O interconnections and 3D chip-stacking technology have received a great number of attentions. Solder micro bumps are widely applied in high density interconnections packaging, but its bonding temperature is still high during process. During chip stacking process, high bonding temperature would lead chip damage and chip warpage induced by the mismatch of coefficient of thermal expansion among each structure within the chip. Also, warpage would cause stress concentration happened within the chip and damage the device and micro interconnections. In order to meet the purpose of low temperature bonding, we demonstrated the chip-to-chip stacking module with a bump pitch of 30um by using non-conductive film in this study. The reliability of the chip-stacking module produced by such low temperature bonding approach was also estimated. A chip-on-chip (COC) structure was used as the test vehicles. There were about 3000 bumps totally in this test vehicle. For evaluating the feasibility of adhesive bonding by NCF in fine pitch micro bumps, Cu/Ni/Au micro bumps joined with Cu/Sn solder micro bumps was conducted by using NCF in this study. After assembly process, thermal cycling test, thermal humidity storage test and high current test were carried out to evaluate the reliability performance of the micro interconnections by such low temperature bonding approach. In this investigation, the chip-on-chip stacking module with a bump pitch of 30μm by using non-conductive film was achieved. The bonding results revealed that the contact resistance of micro joints was about 100 ∼ 350 MΩ. The high deviation of contact resistance was due to the non-melting contact between joined micro bump by soft tin solder. The reliability results revealed that the chip-stacking module produced by NCF could pass the reliability test of 1000 cycles of TCT and 1000 hours of THST. The results of high current test also showed that the NCF joint had excellence endurance against high current density of 5×104 A/cm2 for more than 1300 hours with an increase of contact resistance less than 2%. This study displayed that the NCF material had great potential to be applied in fine-pitch 3D chip stacking. The multi-chip stacking module with a TSV pitch of 20μm produced by NCF will also be presented in this investigation. [ABSTRACT FROM PUBLISHER]

In order to meet the demands of high-performance, high-speed, small form factor and multi-function integration in portable electronic products, the development of packaging technology now trends toward system-in-package (SiP) technology. Three-dimension (3D) integrated circuit technology provides a way to integrate complex micro systems through vertical interconnections among individual devices/chips. For the multi-chip stacking with fine gap and fine pitch solder micro bump interconnection, the dispensing of capillary underfill presents a major limitation in term of process time and process ability during assembly process. In this study, for realizing the multi-chip stacking, we developed a simplified assembly process by wafer-level underfill (WLUF). The WLUF film was laminated on 8” chip wafer with a thickness of 50µm. The chosen solder micro bump structure was Cu/Ni/Sn2.5Ag with a pitch of 30µm. After wafer dicing, the chip with WLUF was assembled on the substrate chip having the same micro bump structure. The optimized bonding parameters in such assembly process were also determined. The experimental results revealed that a robust joining and no voids formed between bonding interface could be achieved by this simplified assembly process. The results of reliability test showed that all samples could pass LV-3 pre-condition test. The failure percentage was about 10% under 1000 cycles of TCT where the failure mode was the cracks of micro joints and Al pad. The failure percentage was about 52% under 1000 hours of THST where the failure mode was crack of micro joints. All samples could pass the Un-biased HAST test. We also evaluated the feasibility of multi-thin-chip stacking by WLUF film. The experimental results showed that the first-layer micro joints raised 2% increase in contact resistance and the thickness of IMC layer increased 1µm thick only after four-layer chip stacking process. These experimental results displayed that the WLUF material exhibited a highly applied potential for multi-chip assembly process. [ABSTRACT FROM PUBLISHER]