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Monolithic silicon photonic technology provides high bandwidth and large volume for datacom applications, while maintaining the low-cost assembly and waferscale test readiness characteristic of CMOS. Monolithic integration and high-yield CMOS processing enables complex, high-performance WDM architectures for CWDM4 transceivers.

Silicon photonics is rapidly becoming the key enabler for meeting the future data speed and volume required by the Internet of Things. A stable manufacturing process is needed to deliver cost and yield expectations to the technology marketplace. We present the key challenges and technical results from both 200mm and 300mm facilities for a silicon photonics fabrication process which includes monolithic integration with CMOS. This includes waveguide patterning, optical proximity correction for photonic devices, silicon thickness uniformity and thick material patterning for passive fiber to waveguide alignment. The device and process metrics show that the transfer of the silicon photonics process from 200mm to 300mm will provide a stable high volume manufacturing platform for silicon photonics designs.

We present a monolithic segmented Mach-Zehnder transmitter, fully integrated in a 90 nm CMOS process. The transmitter exhibits a link sensitivity of −14.1 dBm optical modulation amplitude (OMA) at bit error rate (BER) = 10−-12 at 12.5 Gbps.

CMOS Integrated Nano Photonics (CINPs) hold promise for bringing semiconductor industry efficiency and dramatic cost reductions to optical interconnect applications [1]. IBM has developed a CINP technology (TX) (CMOS9WG) in a sub-100nm CMOS platform where electronic and photonic components are monolithically integrated into the CMOS circuit analog and mixed-signal frontend. This minimizes processing steps, mask levels, component parasitics, and packaging/assembly complexity, and is designed to enabled multi-channel short reach optical interconnects up to 25 Gbaud rates [2]. Hybrid technology solutions also exist, where electrical and optical components are on separate chips [3]. Hybrid and monolithic platforms each offer unique advantages. However, the monolithic platform has the distinct advantage of being able to address both the hybrid and monolithic approaches.

We propose a flexible optical transmitter for the short-reach optical interconnects that includes a silicon photonic segmented Mach–Zehnder modulator driven by a distributed six-channel 32-nm silicon on insulator (SOI) complementary metal-oxide semiconductor driver integrated circuit. Optical equalization is demonstrated to extend the bandwidth limitation of the transmitter with non-return to zero signaling at ${\text{25 Gb/ s}}$ . We also generate four-level pulse amplitude modulation (PAM-4) signaling using the same transmitter architecture. Transmission of 46 Gb/s PAM-4 signal with bit error rate (BER) well below hard-decision forward error correction limit is experimentally demonstrated. Low driver power consumption of 130 mW at ${\text{46 Gb/ s}}$ PAM-4, corresponding to 2.8 pJ/bit power efficiency, is also achieved.

Monolithic CMOS photonics seeks to minimize total transceiver cost by simplifying packaging, design and test. Here we examine 25 Gb/s applications in the context of integrated transistor performance and demonstrate a 4λ×25 Gb/s reference design.

We present a novel silicon photonic transmitter including 90nm CMOS segmented modulator co-packaged with low power 32nm CMOS driver IC. Optical equalization is demonstrated for the first time with the multi-segment Mach-Zehnder modulator at 22Gb/s.

A manufacturable platform of CMOS, RF and opto-electronic devices fully PDK enabled to demonstrate a 4×25 Gb/s reference design is presented. With self-aligned fiber attach, this technology enables low-cost O-band data-com transceivers. In addition, this technology can offer enhanced performance and yield in hybrid-assembly for applications at 25 Gbaud and beyond.

A novel high-speed Mach-Zehnder modulator (MZM) fully integrated into a 90 nm CMOS process is presented. The MZM features 'double-pass' optical phase shifter segments, and the first use of integrated inductors in a 'velocity-matched' distributed-electrode configuration.

The traditional Mach-Zehnder modulator (MZM) figure of merit (FOM) has been defined as (Vπ2)/υ3dBe, and works effectively for LiNbO3 long haul modulators. However, for plasma dispersion based electro-optic modulators, or any modulator that has an inherent relationship between its bandwidth, required drive voltage, and optical insertion loss/gain, this FOM is inappropriate. This is particularly true for short reach links with no optical amplification. In the following, we propose a new modulator FOM (M-FOM) based on device metrics that are essential for short-reach links, such as the peak-to-peak drive voltage, modulator rise-fall time, and relative optical modulation amplitude. Link sensitivity measurements from two MZMs that have different bandwidths and optical losses are compared using our M-FOM to demonstrate its utility. Furthermore, we present a novel application protocol of our M-FOM to provide deeper insight into the relative system impact that modulator performance has on data links with no optical amplification, by taking the ratio of M-FOMs from two modulators driven with the same radio frequency drive power.

A silicon microring modulator with independent resonance and coupling tunability is monolithically integrated with a stacked CMOS driver. At 25Gbps, the OMA is -1.9dBm, the extinction ratio is 3.5dB, and the excess loss is 2.6dB.

Summary form only given. This talk will give a general overview of the IBM Silicon Photonics program and specifically discuss CMOS compatible traveling wave electro-optic modulator design. A Non-Return-to-Zero Transmitter-link penalty calculation protocol for Mach-Zehnder Interferometric modulators based on the phase shifter efficiency-loss figure-of-merit will be presented. Our Transmitter-link penalty analysis protocol allows one to easily assess an expected penalty estimation from only the RF Vpp drive, modulator efficiency loss FOM, and the assumption that transmitter bandwidth is sufficient to support the link data rate, which allows system designers to better understand how device-level performance metrics impact system link budget.

A mid-infrared silicon nanophotonic integrated circuit platform can have broad impact upon environmental monitoring, personalized healthcare, and public safety applications. Development of various mid-IR components, including optical parametric amplifiers, sources, modulators, and detectors, is reviewed.

A brief overview of the IBM Silicon Photonics program will be given. Mach-Zehnder modulator linearization techniques as well as other transmitter focused issues will be presented. Article not available.

We demonstrate the first mid-IR silicon nanophotonic modulator, with a bitrate of 3Gbps. Our results show that similar design methodologies can be applied to silicon mid-IR active devices as for telecom devices.

Microring-based silicon electro-optic modulators allow high-speed and low-power devices to be fabricated in small footprints. A 30 Gbps reverse-biased microring modulator, and an 8 Gbps forward-biased microring modulator with hybrid-integrated preemphasis driver, are presented.

Optical amplification has been demonstrated in waveguides fabricated in Nd-doped LiNbO3 grown from a melt1 and in planar diffused Er: LiNbO3.2 Such substrates are, however, not compatible with guided wave integrated optics since absorption will occur in every section of the waveguide which is not optically pumped to transparency. Lateral confinement of the gain medium is also necessary to avoid absorption of the evanescent field. We report a method for local incorporation of Er3+ which significantly enhances the diffusivity of the rare earth ion and is compatible with standard Ti: LiNbO3 photolithographic processing.