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A new experimental apparatus for charged particle detection, named EXODET (EXOtic DETector) has been designed to be used in nuclear physics experiments involving radioactive ion beams (RIBs). A typical feature of RIBs presently available at the first-generation production facilities is the low beam intensity ([10.sup.5]-[10.sup.6] pps); therefore, a large solid angle coverage and a high granularity are required to allow the reconstruction of the complete event kinematics. In this paper, we present the main features of the EXODET apparatus, fulfilling the previous requirements, and the first experimental results. Index Terms--ASIC electronics, detectors, radioactive ion beams.

The ARGO-YBJ experiment is presently under construction at the Yangbaijing High-Altitude Cosmic Ray Laboratory (4300 m a.s.l), 90 km north to Lhasa (Tibet, People's Republic of China). ARGO will study fundamental issues in cosmic ray and astroparticle physics by detecting small-size air showers. The detector covers 74 x 78 [m.sup.2] with single layer resistive plate counters (RPCs), surrounded by a partially instrumented guard ring. The ARGO Data Acquisition System is designed around static random access memory (SRAM)-based field programmable gate arrays (FPGAs), in order to achieve a fully reconfigurable architecture. In this environment, the same hardware platform performs different functions provided by companion FPGAs' configuration files. Control and monitoring software exploits a web browser to deliver commands and perform diagnostic tests on the boards. In this paper, we describe the hardware and the software strategies that allow the ARGO DAQ to benefit from the flexible architecture of in-system reconfigurable FPGAs. Index Terms--Data acquisition systems (DAQs), field programmable gate arrays (FPGAs).

A read-out controller (ROCK) has been developed for the Data Acquisition System of the KLOE High Energy Physics experiment, based in Frascati, Italy. The ROCK performs data acquisition in an event-driven fashion on the AUXbus, a custom high speed parallel bus. The AUXbus's main features are data cycles labeled by event number, sparse data scan operations and an asynchronous protocol optimized to achieve data rates up to 15 MHz. On a standard VMEbus, the ROCK allows for data snooping and real-time performance monitoring, without additional overhead on data acquisition. ROCK boards can be linked together via a custom cable bus (Cbus) to build a complex DAQ subsystem. The ROCK board has been designed around three 4.2K gate XILINX FPGAs. Dual port FIFO banks are used to decouple the asynchronous buses. A preliminary version of the board is presented and test results are briefly discussed.

We describe a 96 bit zero-suppressor and encoder VME board designed for the RPC trigger system of the L3 Forward/Backward Muon detector at CERN. Running at 20 MHz clock frequency, the board processes the elementary 96 bit wide detector pattem in less than one microsecond, storing hit addresses in a FIFO array. Details of the board architecture - based on seven XILINX XC3020 LCAs - are presented and simulation and preliminary test results are briefly reported.