24 results on '"Takagi, Shin-ichi"'
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2. Device design and electron transport properties of uniaxially strained-SOI tri-gate nMOSFETs
3. Device design of high-speed source-heterojunction-MOS transistors (SHOTs): optimization of source band offset and graded heterojunction
4. Hole-mobility enhancement in Ge-rich strained SiGe-on-insulator pMOSFETs at high temperatures
5. High-speed source-heterojunction-MOS-transistor (SHOT) utilizing high-velocity electron injection
6. Control of threshold-voltage and short-channel effects in ultrathin strained-SOI CMOS devices
7. On the origin of increase in substrate current and impact ionization efficiency in strained-Si n- and p-MOSFETs
8. (110)-Surface strained-SOI CMOS devices
9. Thin-film strained-SOI CMOS devices-physical mechanisms for reduction of carrier mobility
10. Scaling effects on gate leakage current
11. Ultrathin body SiGe-on-insulator pMOSFETs with high-mobility SiGe surface channels
12. High-performance strained-SOI CMOS devices using thin film Si-Ge-on-insulator technology
13. Influences of buried-oxide interface on inversion-layer mobility in ultra-thin SOI MOSFETs
14. Novel SOI p-channel MOSFETs with higher strain in Si channel using double SiGe heterostructures
15. Advanced SOI p-MOSFETs with strained-Si channel on SiGe-on-insulator substrate fabricated by SIMOX technology
16. SiGe source/drain structure for the suppression of the short-channel effect of sub-0.1-m p-channel MOSFETs
17. Impact of electron and hole inversion-layer capacitance on low voltage operation of scaled n- and p-MOSFET's
18. Characterization of inversion-layer capacitance of holes in Si MOSFET's
19. A new I-V model for stress-induced leakage current including inelastic tunneling
20. Experimental evidence of inelastic tunneling in stress-induced leakage current
21. Evaluation of the valence band discontinuity of Si/Si sub 1-xGe sub x/Si heterostructures by application of admittance spectroscopy to MOS capacitors
22. Quantitative understanding of inversion-layer capacitance in Si MOSFET's
23. Effects of surface orientation
24. On the universality of inversion layer mobility in Si MOSFET's: part I-effects of substrate impurity concentration
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