Search

In this study, we examine the effect of oxygen vacancies ( ${V}_{O}$ ) near the back surface of p-type tin monoxide (SnO) semiconductors on the device performance of its thin-film transistors (TFTs). Non-stoichiometry of the SnO surface layer was controlled through oxidant exposure conditions during alumina (Al2O3) growth using plasma-enhanced atomic layer deposition (PEALD). During the initial period of Al2O3 deposition, trimethylaluminum precursors absorbed oxygen from the SnO layer and created the ${V}_{O}$ , which can form a ${V}_{O}$ -rich region at the Al2O3/SnO interface. By modulating the oxygen plasma density during the PEALD process, the ${V}_{O}$ was effectively controlled, allowing the electrical characteristics to transition from ambipolar behavior to ${p}$ -channel only conduction. This study demonstrates the importance of the back surface of SnO, suggesting a new perspective of ambipolar behavior in p-type SnO semiconductors.

This letter reports the fabrication of high performance polycrystalline InGaSnO (IGTO) thin-film transistors (TFTs) at a low temperature of 400 °C. The microstructure of IGTO films was analyzed using X-ray diffraction and high-resolution transmission electron microscopy. The fabricated polycrystalline IGTO TFTs exhibited an unexpected high mobility of 116.5 cm2/Vs, threshold voltage of 0.47 V, low subthreshold gate swing of 134 mV/decade, and ${I}_{ON/OFF}$ ratio of $> 1\times 10^{9}$ . Moreover, the stable behavior against external gate bias stress was observed for crystalline IGTO TFTs, which was attributed to the high degree of metal-oxygen lattice ordering.

We report on a stable and sensitive biochemical sensor based on amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistors (TFTs) with a versatile extended-gate electrode used as the sensing membrane. The extended-gate allows the active transistor channel not to be exposed to the ionic analyte and the gate surface may be modified with chemicals or affinity reagents without affecting the operation of the active sensor. The extended-gate a-IGZO TFT was able to detect the pH levels of various solutions based on protonation and deprotonation at the surface of the indium-tin-oxide (ITO) extended-gate electrode achieving a pH dependent threshold voltage shift of 22.8 mV/pH. Highly sensitive and specific protein sensing was achieved for both electrical polarities according to pH values of solutions using the biotin-streptavidin interaction. The extended-gate TFT sensor demonstrated a detection limit for streptavidin down to 10 fM, using the biotin-streptavidin binding on the extended-gate surface. It was also possible to detect changes in the streptavidin concentration in real-time with specificity and repeatability. Since the extended-gate can be easily replaced without affecting the performance of the a-IGZO TFT, this sensor configuration may be utilized for future multifunctional biomolecular sensing and analysis.

Low-temperature (≤400 °C), stackable oxide semiconductors are promising as an upper transistor ingredient for monolithic three-dimensional integration. The atomic layer deposition (ALD) route provides a low-defect, high-quality semiconducting oxide channel layer and enables accurate controllability of the chemical composition and physical thickness as well as excellent step coverage on nanoscale trench structures. Here, we report a high-mobility heterojunction transistor in a ternary indium gallium zinc oxide system using the ALD technique. The heterojunction channel structure consists of a 10 nm thick indium gallium oxide (IGO) layer as an effective transporting layer and a 3 nm thick, wide band gap ZnO layer. The formation of a two-dimensional electron gas was suggested by controlling the band gap of the IGO quantum well through In/Ga ratio tailoring and reducing the physical thickness of the ZnO film. A field-effect transistor (FET) with a ZnO/In

An organic-inorganic hybrid superlattice with near perfect synergistic integration of organic and inorganic constituents was developed to produce properties vastly superior to those of either moiety alone. The complementary hybrid superlattice is composed of multiple quantum wells of 4-mercaptophenol organic monolayers and amorphous ZnO nanolayers. Within the superlattice, multichannel formation was demonstrated at the organic-inorganic interfaces to produce an excellent-performance field effect transistor exhibiting outstanding field-effect mobility with band-like transport and steep subthreshold swing. Furthermore, mutual stabilizations between organic monolayers and ZnO effectively reduced the performance degradation notorious in exclusively organic and ZnO transistors.

A low on–off current modulation ratio (ION/OFF) in p-type tin monoxide (SnO) field-effect transistors (FETs) is a critical bottleneck hampering their widespread application to transparent complementary metal oxide semiconductors (CMOSs) or monolithic integrated devices. To solve this problem, this study focuses on the source/drain (S/D) contact region. Also, a new perspective on the origin of the high off-current in SnO FETs, an electron injection from the drain electrode into the channel by Fermi-level pinning (FLP) at the off-state, is suggested. In this work, a metal–interlayer–semiconductor (MIS) S/D contact structure is adopted to suppress this adverse electron injection. An ultrathin interlayer (IL) of MIS contact alleviates metal-induced gap state (MIGS) penetration which is a primary cause of the severe FLP. A considerable enhancement is achieved by using the MIS contact structure: the off-current value decreased by approximately 20-fold from 5.1 × 10−8 A to 2.4 × 10−9 A; the ION/OFF value increased 10-fold from 2.7 × 102 to 2.8 × 103, which is interpreted by increased MIS contact-mediated electron SBH. This work presents a new approach that can be easily used alongside previously reported methods to suppress the off-current, providing enhanced switching capability of p-type SnO FETs using a simple method.

Effects of lanthanum (La) loading on the structural, optical, and electrical properties of tin monoxide (SnO) films were examined as a p-type semiconducting layer. La loading up to 1.9 atom % caused the texturing of the tetragonal SnO phase with a preferential orientation of (101), which was accompanied by the smoother surface morphology. Simultaneously, the incorporated La cation suppressed the formation of n-type SnO

We propose a novel structure to solve the hole erase problem of Indium-Gallium-Zinc-Oxide (IGZO) channels. The proposed structures are an IGZO-nitride-P filler (INP) structure and an IGZO-P filler (IP) structure. In the simulations using both structures, stable operation and erase efficiency can be achieved in an INP structure when the nitride barrier thickness is 7 nm. The erase performance achieved exceeds that of the polysilicon channel under the same conditions. Conversely, if the nitride thickness exceeds 8 nm, the read operation becomes unstable. Therefore, nitride thickness is an important parameter in the operation of an INP structure, and its maximum value is 7 nm. For improving upon this INP structure, the nitride was removed to create an IP structure, in which, leakage currents could be limited by reducing doping concentration. In particular, such an IP structure showed that the maximum erase performance (2 ms) of the polysilicon channel can only be achieved at $2.3~\mu \text{s}$ , and then the erase operation can continue. This result is due to lack of electron accumulation in the channel and their ability to move quickly through the filler directly connected to the IGZO channel. As a result, both proposed structures have shown that low erase performance can be overcome without sacrificing the excellent leakage current blocking characteristics of IGZO material.

In this study, we developed a V-NAND with an improved IGZO-P type (IP) floating filler (FF) structure based on an IGZO channel verified in previous studies and demonstrated that it has a very fast erase speed through device simulation. The proposed FF structure can supply holes generated through the Gate-Induced Drain Leakage (GIDL) phenomenon in the upper polysilicon string select line (SSL) channel to the IGZO channel through a P-type filler, and the structure proposed by this operation shows a very fast erase speed of 4 μs. A fast erase speed was achieved because the filler adjacent to the IGZO channel, like IP structures in previous studies, functioned as a path through which electrons emitted from the charge storage layer moved easily, rather than simply supplying holes. This assumption was confirmed by assessing the change in electron density of the channel during the erase operation. Next, we investigated the optimum conditions for leakage current reduction through various condition changes of the lower ground select line (GSL) gate in the proposed structure. We confirmed that the leakage current of the proposed structure can be minimized by changing the number of lower GSL gates, changing the length of the GSL channel, and/or changing the work function of the GSL gate material. We obtained a leakage current of 10−17 A when the GSL channel was 480 nm long with six GSL gates, each with a length of 40 nm. The work function of the gates was 4.96 eV.

This work was supported by the industrial strategic technology development program funded by MKE/KEIT under grants 10079974 and Samsung research funding center for future technology through Samsung Electronics

With potentials to outperform traditional semiconductors, oxide semiconductors are penetrating into a wide range of energy, environmental, and electronic applications. However, an insufficient libr...

Novel TaO x encapsulation was presented to enhance the field-effect mobility (μFE) of ZnON thin-film transistors (TFTs) consisting of a metallic Ta film deposited onto the ZnON surface followed by a modest annealing process. The resulting TaO x/ZnON film stack exhibited a more uniform distribution of nanoscale ZnON crystallites with increased stoichiometric anion lattices compared to the control ZnON film. The control ZnON TFTs exhibited a reasonable μFE, subthreshold gate swing (SS), and ION/OFF ratio of 36.2 cm2/V·s, 0.28 V/decade, and 2.9 × 108, respectively. A significantly enhanced μFE value of 89.4 cm2/V·s was achieved for ZnON TFTs with a TaO x encapsulation layer, whereas the SS of 0.33 V/decade and ION/OFF ratio of 8.6 × 108 were comparable to those of the control device. This improvement could be explained by scavenging and passivation effects of the TaO x film on the ZnON channel layer. Density of states (DOS)-based modeling and simulation were performed to obtain greater insight with regard to increasing the performance of the ZnON TFTs with a TaO x encapsulation layer. A smaller number of subgap states near the conduction band (CB) minimum and a higher net carrier density for the TaO x-capped device increased the Fermi energy level toward the CB edge under thermal equilibrium conditions, leading to efficient band conduction and fast carrier transport under the on-state condition.

Ultrahigh-resolution displays for augmented reality (AR) and virtual reality (VR) applications require a novel architecture and process. Atomic-layer deposition (ALD) enables the facile fabrication of indium-gallium zinc oxide (IGZO) thin-film transistors (TFTs) on a substrate with a nonplanar surface due to its excellent step coverage and accurate thickness control. Here, we report all-ALD-derived TFTs using IGZO and HfO2 as the channel layer and gate insulator, respectively. A bilayer IGZO channel structure consisting of a 10 nm base layer (In0.52Ga0.29Zn0.19O) with good stability and a 3 nm boost layer (In0.82Ga0.08Zn0.10O) with extremely high mobility was designed based on a cation combinatorial study of the ALD-derived IGZO system. Reducing the thickness of the HfO2 dielectric film by the ALD process offers high areal capacitance in field-effect transistors, which allows low-voltage drivability and enhanced carrier transport. The intrinsic inferior stability of the HfO2 gate insulator was effectively mitigated by the insertion of an ALD-derived 4 nm Al2O3 interfacial layer between HfO2 and the IGZO film. The optimized bilayer IGZO TFTs with HfO2-based gate insulators exhibited excellent performances with a high field-effect mobility of 74.0 ± 0.91 cm2/(V s), a low subthreshold swing of 0.13 ± 0.01 V/dec, a threshold voltage of 0.20 ± 0.24 V, and an ION/OFF of ∼3.2 × 108 in a low-operation-voltage (≤2 V) range. This promising result was due to the synergic effects of a bilayer IGZO channel and HfO2-based gate insulator with a high permittivity, which were mainly attributed to the effective carrier confinement in the boost layer with high mobility, low free carrier density of the base layer with a low VO concentration, and HfO2-induced high effective capacitance.

Since the invention of IGZO by Prof. Hosono in 2004, the development of IGZO thin-film transistors has been accelerated by material optimization including cation composition, processing conditions, and careful architecture design such as a self-aligned structure. In this chapter, the baseline of the current IGZO backplane technology for AMOELD TVs will be addressed including the architecture and process optimization of IGZO TFTs. In particular, the next-generation backplane technology beyond IGZO and SiO2 will be briefly presented from the viewpoint of high mobility and low-voltage operation. Finally, the device instability of IGZO TFTs will be discussed, which is critical for their implementation in AMOLED products. The degradation mechanisms for the bias thermal stress and light illumination will be summarized including the carrier trapping/injection, defect creations such as oxygen vacancies, oxygen interstitials, and a hydrogen complex model.

On behalf of myself and my fellow Guest Editors for the Special Issue on Ultra Wide Band Gap Semiconductors for Power Control and Conversion appearing in this month’s issue of the IEEE Transactions on Electron Devices, we are gratified to be able to present readers with a selection of papers spanning the current state of the art in wide and ultrawidebandgap semiconductor devices. Electronics for power control and conversion is presently going through a renaissance, with new device concepts, extensions of known concepts to new materials, and new applications all merging simultaneously. Fundamental material-level work in Ga2O3, diamond, Al(Ga)N, and other ultrawidebandgap materials have begun to produce device results commensurate with the fundamental advantages that these materials promise for power control and conversion applications. At the same time, the understanding and performance of devices based on SiC and GaN continue to improve. Applications of these new materials and devices include automotive, data center power management, grid control, industrial and locomotive traction control, and others. Despite the tremendous progress in this area, however, much remains to be understood. The role of intrinsic and extrinsic defects in these materials on device performance, optimal strategies for device design and fabrication, surface passivation, and dielectric materials suitable for the high electric fields supported by these materials, device structures, and concepts for achieving the best possible electrical performance, appropriate approaches to thermal management, and the potential and challenges of integration of these devices with other semiconductors for system implementation are all areas in which rapid progress is being made.

In this study, we evaluated the structural, chemical, and electrical properties of ternary alloy aluminum yttrium oxide (Al2-xYxO3) films prepared by employing a low-cost spin-cast technique. Al2-xYxO3 films annealed at 400 °C were found to possess smooth and excellent insulating characteristics compared to their binary Al2O3 or Y2O3 film counterparts. This superior performance of the Al2-xYxO3 films as a gate insulator can be explained based on structure stabilization from the cation alloying mixing effect. The amorphous indium zinc oxide (a-IZO) thin-film transistor (TFT) with the ternary alloy Al0.45Y1.55O3 film exhibited a high mobility of 52.9 cm2/V, a low subthreshold gate swing of 0.19 V/decade, a threshold voltage of −0.51 V, a high ION/OFF ratio of 4 × 106, and good hysteresis-free stability, suggesting that the solution-based Al0.45Y1.55O3 dielectric film is an attractive candidate as a gate dielectric for high-performance and low-cost a-IZO TFTs.

This paper reports why the Cu/MoTi/In-Ga-Zn-O(IGZO) contact schematic exhibited acceptable electrical properties and stability in an IGZO transistor that is used in a state-of-the-art active-matrix organic-light-emitting-diodes television as the switcher and driver. For a comparative study, different Cu/diffusion barrier(DB)/IGZO contact schemes (DB = Mo, Ti, and MoTi) were applied in IGZO transistors to evaluate the suitability of different diffusion barriers. The IGZO transistor with the Cu/(Mo, Ti)/IGZO contact exhibited improved carrier mobility and a lower gate swing compared to those of the control device with direct Cu/IGZO contact. The role of the Mo DB was to effectively prevent in-diffusion of Cu atoms during thermal annealing, which is responsible for its superior performance. In contrast, the Ti DB was found to be suitable for low-ohmic contact due to its higher oxidation power, leading to enhanced transport properties. a-IGZO thin-film transistors with the Cu/MoTi/IGZO stack showed the best transport properties in terms of the mobility, gate swing, and contact resistance. Our findings are discussed on the basis of the synergic effect of the MoTi alloy system based on various structural and chemical analyses.

This paper proposes a new defect engineering concept for low-cost In- and Ga-free zinc tin oxide (ZTO) thin-film transistors (TFTs). This concept is comprised of capping ZTO films with tantalum (Ta) and a subsequent modest thermal annealing treatment at 200 °C. The Ta-capped ZTO TFTs exhibited a remarkably high carrier mobility of 70.8 cm2/Vs, low subthreshold gate swing of 0.18 V/decade, threshold voltage of −1.3 V, and excellent ION/OFF ratio of 2 × 108. The improvement (> two-fold) in the carrier mobility compared to the uncapped ZTO TFT can be attributed to the effective reduction of the number of adverse tailing trap states, such as hydroxyl groups or oxygen interstitial defects, which stems from the scavenging effect of the Ta capping layer on the ZTO channel layer. Furthermore, the Ta-capped ZTO TFTs showed excellent positive and negative gate bias stress stabilities.

ZnO-based oxide films are emerging as high-performance semiconductors for field-effect transistors (FETs) in optoelectronics. Carrier mobility and stability in these FETs are improved by introducing indium (In) and gallium (Ga) cations, respectively. However, the strong trade-off between the mobility and stability, which come from In or Ga incorporation, still limits the widespread use of metal oxide FETs in ultrahigh pixel density and device area-independent flat panel applications. We demonstrated that the incorporation of antimony (Sb) cations in amorphous zinc indium oxide (ZIO) simultaneously enhanced the field-effect mobility (μFET) and electrical stability of the resulting Sb-doped ZIO FETs. The rationale for the unexpected synergic effect was related to the unique electron configuration of Sb5+ ([Kr]4d105s05p0). However, the benefit of Sb doping was not observed in the zinc tin oxide (ZTO) system. All the Sb-doped ZTO FETs suffered from a reduction in μFET and a deterioration of gate bias stress s...

This paper reports a new p-type tin oxyselenide (SnSeO), which was designed with the concept that the valence band edge from O 2p orbitals in the majority of metal oxides becomes delocalized by hybridizing Se 4p and Sn 5s orbitals. As the Se loading increased, the SnSeO film structures were transformed from tetragonal SnO to orthorhombic SnSe, which was accompanied by an increase in the amorphous phase portion and smooth morphologies. The SnSe0.56O0.44 film annealed at 300 °C exhibited the highest Hall mobility (μHall), 15.0 cm2 (V s)−1, and hole carrier density (nh), 1.2 × 1017 cm–3. The remarkable electrical performance was explained by the low hole effective mass, which was calculated by a first principle calculation. Indeed, the fabricated field-effect transistor (FET) with a p-channel SnSe0.56O0.44 film showed the high field-effect mobility of 5.9 cm2 (V s)−1 and an ION/OFF ratio of 3 × 102. This work demonstrates that anion alloy-based hybridization provides a facile route to the realization of a hi...

In this paper, we report primary color generation method from white top-emission organic light emitting diodes (WTEOLEDs) by applying cavity control layer (CCL) for achieving high resolution display. In order to realize primary colors, we applied high efficiency two-stack WTEOLED structure with solution processed indium zinc oxide CCL. Using optically designed two-stack WTEOLED with CCL, we fabricated red, green, and blue TEOLEDs with current efficiency of 34.9, 79.5, and 3.4 cd/A, respectively. However, there is an issue of intense blue emission in the red color device due to its cavity condition. To suppress this blue emission, silver nanoparticles doped electron transfer layer and rubrene doped hole transport layer methods were successively used due to their high absorption in the blue region. By applying these two methods together, top-emission red device showed 80% reduction in blue color intensity.

The device performance of amorphous In–Zn–O ( a -IZO) thin-film transistors (TFTs) with printed Cu contacts was significantly improved by the insertion of a diffusion barrier Ta layer and rapid thermal process (RTP) annealing. Furnace-annealed a -IZO TFTs with Cu/Ta contacts exhibited mobility values of 21.3 cm 2 /Vs, subthreshold gate swing ( SS ) values of 1.9 V/decade, and I ON / OFF of ~ 10 6 . In contrast, the SS , mobility, and I ON / OFF ratio of RTP-annealed a -IZO TFTs with Cu/Ta contacts were 30.6 cm 2 /Vs, 0.68 V/decade, and 3 × 10 7 , respectively. We attributed the performance improvement of devices with Cu/Ta contacts to the suppression of Cu in-diffusion within the a -IZO channel due to the rapid heating associated with RTP annealing.

A facile route for the preparation of a solution-processed silicon oxide dielectric from perhydropolysilazane (PHPS) at a low temperature (≤150 °C) is proposed. Deep ultraviolet (DUV) irradiation on the PHPS-derived silicon oxide film, where the coupling agent of vinyltriethoxysilane (VTES) was introduced to assist the formation of the Si–O lattice network at a low temperature, allowed the prepared silicon oxide film to have device-quality insulating properties. The metal/insulator/metal capacitor with DUV-annealed silicon oxide exhibited a low gate leakage current density of 7.0 × 10−8 A cm−2 at 1 MV cm−1, which was attributed to the photon-assisted purification and densification of the silicon oxide film. The suitability of this silicon oxide film as a gate insulator was evaluated in all-solution-processed indium zinc oxide (IZO) thin-film transistors (TFTs). The IZO TFTs that were fabricated at a contact annealing temperature of 150 °C exhibited a high field-effect mobility of 17.3 cm2 V−1 s−1, a threshold voltage of 2.7 V, and an ION/OFF modulation ratio of 1 × 105. Therefore, DUV-assisted IZO TFTs with a PHPS-derived silicon oxide insulator are promising candidates for low-temperature, large-area, and flexible electronics for use on inexpensive plastic substrates.

Display Omitted We fabricated low temperature solution-based the In2O3/ZrO2 TFTs.Li doping enhances the crystallization of low-temperature solution-based In2O3.Enhanced crystallization of In2O3 reduces the inter-diffusion of In and Zr.Li doping increases the carrier mobility of the In2O3/ZrO2 TFTs. We improved the performance of low-temperature solution-processed thin film transistors (TFTs) by lithium doping of In2O3/ZrO2 gate stacks. Li incorporation into In2O3 reduced interface diffusion of ZrO2 and improved channel mobility. Enhanced crystallization of Li-doped In2O3 thin films as well as the small equivalent oxide thickness of ZrO2 were determined to be key factors in the observed improvement in device performance. An increase in the Li+]/In3+] ratio over the optimum value resulted in performance degradation, which we attributed to the formation of higher energy barriers due to grain boundaries.

This paper reports a solution processed electrical device with zirconium oxide gate dielectric that was fabricated at a low enough temperature appropriate for flexible electronics. Both inorganic dielectric and channel materials were synthesized in the same organic solvent. The dielectric constant achieved was 13 at 250 °C with a reasonably low leakage current. The bottom gate transistor devices showed the highest mobility of 75 cm 2 /V s. The device is operated at low voltage with high- k dielectric with excellent transconductance and low threshold voltage. Overall, the results highlight the potential of low temperature solution based deposition in fabricating more complicated circuits for a range of applications.

This paper examined the effects of postdeposition annealing on the electrical properties of titanium-capped (TC) indium–zinc oxide (IZO) films and their IZO thin-film transistors. The TC IZO transistor oxidized at the temperature of 300 °C exhibited a high field-effect mobility of 61.0 cm $^{2}$ /Vs, low subthreshold gate swing of 110 mV/decade, $V_{\rm th}$ of −0.4 V, and high $I_{{\mathrm{{\scriptscriptstyle ON}}/\mathrm{{\scriptscriptstyle OFF}}}}$ ratio of $2.3 \times 10^{8}$ . In addition, the positive gate bias stress-induced stability of the TC IZO transistor was better than that of the control device without metal capping treatment. This was attributed to the scavenging effect of the loosely bonded oxygen species in the IZO semiconductor by titanium thermal oxidation.

The effects of antimony (Sb) doping on solution-processed indium oxide (InOx) thin film transistors (TFTs) were examined. The Sb-doped InSbO TFT exhibited a high mobility, low gate swing, threshold voltage, and high ION/OFF ratio of 4.6 cm2/V s, 0.29 V/decade, 1.9 V, and 3 × 107, respectively. The gate bias and photobias stability of the InSbO TFTs were also improved by Sb doping compared to those of InOx TFTs. This improvement was attributed to the reduction of oxygen-related defects and/or the existence of the lone-pair s-electron of Sb3+ in amorphous InSbO films. (© 2014 WILEY-VCH Verlag GmbH &Co. KGaA, Weinheim)

Indium zinc oxide (IZO) thin film transistors (TFTs) with poly(4-vinylphenol-co-methylmethacrylate) (PVP-co-PMMA) gate insulators were fabricated at a low temperature (250 °C). The bottom gate IZO TFTs with a PVP-co-PMMA gate electric film exhibited inferior device performance to the top gate IZO TFTs, which was attributed to sputtering damage of the underlying polymer gate dielectric film during IZO channel formation. The charge carrier transport and interface properties of the IZO TFTs could be further improved by introducing a ZrO2 precursor to the polymer gate insulator. The ZrO2 molecules were well dispersed in the polymer film. The resulting hybrid dielectric film showed a higher capacitance and a smoother morphology than the PVP-co-PMMA dielectric film. The hybrid dielectric-gated IZO TFT had a high mobility of 28.4 cm2 V−1 s−1, low subthreshold gate swing of 0.70 V per decade, and a high Ion/off ratio of 4.0 × 107.

This study examined the effects of the chamber pressure, radio frequency power and oxygen flow ratio during channel deposition on the performance and photobias stability of zinc tin oxide (ZTO) thin film transistors (TFTs). The densification of the ZTO thin film allowed the improvement in the field-effect mobility and the suppression in the negative bias illumination stress (NBIS) instability of the resulting TFTs simultaneously, irrespective of the specific process condition. The porosity in the ZTO channel layer was shown to prevent the effective intercalation of the Sn 5s orbital and, thus, deteriorate the field-effect mobility. Furthermore, the increased effective surface area in the porous ZTO film adversely affected the NBIS stability of the resulting TFTs because the porosity-related surface states and oxygen vacancy defects provide the hole trapping centers and the delocalized electron free carrier, respectively. Therefore, the densification of ZTO channel layer is a key factor for the high mobility and good photobias stability of the TFTs. This concept can be applicable for any metal-oxide-TFTs.

This paper examined the morphological, structural, and electrical properties of thermal titanium oxide (TiOx) films as a function of the physical thickness. All the thermal TiOx films were assigned to a TiO2 chemical state irrespective of the film thickness. The thinner TiO2 films (≤ 5 nm) showed an amorphous phase, whereas the thicker TiO2 film (≥ 7 nm) had a nanocrystalline structure. This intriguing thickness-dependent crystallization behavior can be explained by the dimensional effect. The mobility of the resulting zinc tin oxide (ZTO) thin-film transistors (TFTs) with a gate-stack of silicon nitride (SiNx) and TiO2/SiNx was monotonously reduced with increasing TiO2 film thickness, which can be attributed to the enhanced Columbic scattering effect of TiO2 films. On the other hand, the negative bias illumination stress instability of the ZTO TFTs can be suppressed significantly to -2.4 V by the adoption of a 5-nm-thick TiO2 film compared with that (-14.4 V) of the ZTO device without a TiO2 film, which is discussed based on the valence band-off structure and the amorphous nature of thermal TiO2 films.

This letter reports the effects of Ca doping into Cu films, which was used as a source/drain (S/D) electrode for high performance amorphous In–Ga–Zn–O (IGZO) thin-film transistors (TFTs) with a low resistive–capacitive delay time. The IGZO TFTs with Ca-doped Cu S/D exhibited three times higher saturation mobility (16 cm $^{2}$ /Vs) and substantially lower subthreshold gate swing of 0.39 V/decade than the control devices with pure Cu S/D. The SIMS profile and cross-sectional transmission electron microscopy showed that Ca effectively prevented the Cu atoms from diffusing into channel IGZO region presumably as a result of Ca–O bond formation, which is responsible for their superior device performances.

Metal oxide optoelectronics is an emerging field that exploits the intriguing properties of the ns orbital-derived isotropic band structure as a replacement for traditional silicon-based electronics in advanced active-matrix information displays. Although the device performance of metal oxide thin film transistors (TFTs) has been substantially improved, the device reliability against external light and gate bias stress remains a critical issue. This paper provides a literature review of light-induced gate bias stress instability in metal oxide TFTs and explain the importance of photo-bias instability in the applications of metal oxide TFTs to optoelectronic device. The rationale of threshold voltage (Vth) instability under the negative bias illumination stress (NBIS) condition is discussed in detail. The charge trapping/injection model, oxygen vacancy photoionization model, and ambient interaction model are described as plausible degradation mechanisms. Finally, the possible approaches to prevent NBIS-induced Vth instability are proposed based on an understanding of the NBIS instability.

Spin-coated zirconium oxide films were used as a gate dielectric for low-voltage, high performance indium zinc oxide (IZO) thin-film transistors (TFTs). The ZrO2 films annealed at 400 °C showed a low gate leakage current density of 2 × 10–8 A/cm2 at an electric field of 2 MV/cm. This was attributed to the low impurity content and high crystalline quality. Therefore, the IZO TFTs with a soluble ZrO2 gate insulator exhibited a high field effect mobility of 23.4 cm2/V s, excellent subthreshold gate swing of 70 mV/decade and a reasonable Ion/off ratio of ∼106. These TFTs operated at low voltages (∼3.0 V) and showed high drain current drive capability, enabling oxide TFTs with a soluble processed high-k dielectric for use in backplane electronics for low-power mobile display applications. (© 2013 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

This study examined the performance and reliability of HfO 2 gate dielectrics in p-type metal-oxide-semiconductor field effect transistors (pMOSFETs) capped with Al or Al 2 O 3 . The presence of Al capping deteriorated the pMOSFET scalability and channel mobility compared to Al 2 O 3 capping. Al capping caused a higher rate of Al diffusion in the HfO 2 dielectric layer, reducing the device performance and oxide thickness scaling. This degradation of the negative bias temperature instability of the Al-incorporated sample was attributed to decay of the interface quality rather than to a decrease in charge trapping in the bulk high- k dielectric.

We investigated the effect of photon irradiation with various energies on the gate bias instability of indium–gallium–zinc oxide transistors. The illumination of red and green light on the transistor caused positive threshold voltage (Vth) shifts of 0.23 V and 0.18 V, respectively, while it did not affect the Vth value in blue light after a positive bias stress. However, the stability of transistors was deteriorated with increasing photon energy after a negative bias stress: negative Vth shifts for red (−0.23 V) and blue light (−3.7 V). This difference can be explained by the compensation effect of the electron carrier trapping and the creation of meta-stable donors via photon excitation.

In this paper an examination is presented of the effect of the gate dielectric materials and bilayer stack on the negative bias illumination stress (NBIS) instability of InGaZnO (IGZO) TFTs. The threshold voltage (V"t"h) movement by NBIS was greatly dependent on the valence band off-set and the effective vertical electrical field, suggesting that the trapping or injection of photo-generated hole carriers into the gate insulator plays an important role. The process of hole carrier creation by photon irradiation onto the IGZO channel layer is shown by independent experiments to involve the oxygen vacancy defects. The reduction in the oxygen vacancy of IGZO semiconductor by the high pressure O"2 annealing resulted in the strong increase in the V"t"h instability induced by NBIS, indicating that the generation of hole carriers can result from the photo-induced transition mechanism from [V"O] to [V"O^2^+].

Device performance and reliability characteristics of various types of Ru–Al-based metal gates on HfSiO gate dielectrics were investigated for p-type metal-oxide-semiconductor field effect transistor (pMOSFET) applications. Using the high work function of Ru and a dipole formed by Al atoms in a gate dielectric, the threshold voltage of the pMOSFET could be controlled successfully. However, the excessive diffusion of Al atoms generated more interface states and bulk trapping in the high-k dielectric layer and degraded the device performances and reliability characteristics. It was also found that the carefully tailored sequence of deposition and composition of Ru and Al metals can be used to prevent the excessive diffusion of Al atoms.

Recently, amorphous InGaZnO thin film transistors (TFTs) have been intensively studied because they exhibit large mobility (>10cm/Vs) and relatively good stability despite their amorphous phase. Before InGaZnO TFTs as a backplane device are adopted into the flat panel displays such as active matrix liquid crystal display or organic light-emitting diodes display in the mass-production, there are several issues to be addressed: first, the most promising candidates are based on systems including indium (over 40 % for ternary system) to achieve high channel mobility. Nevertheless, the estimated amount of indium in the earth’s crust is only 6000 tons, and its depletion is becoming a serious problem. Second, the accurate and repeatable control of such a complex material in mass production stage is not an easy task. Therefore, solutions avoiding the use of indium and finding the novel oxide system with binary oxide compositions are preferable. Here, tin-based oxide semiconductor as a channel layer of TFTs was revisited. Because tin ion [ex. Sn: 4d5s] has an orbital similarity of indium ion [In: 4d5s], the high mobility can be attainable. So far, tin oxide has been used as the main component of a transparent conductive oxide such as ITO. However, its application to active channel of TFTs was limited due to the difficulty in controlling the net electron density (Nd) (