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In the operation of cascaded H-bridge (CHB) converters and modular multilevel converters (MMCs) with energy storage or renewable power resources, unbalanced active power distribution among the submodules (SMs) is unavoidable. Depending on the operating conditions, there are certain upper and lower limits on the active power that can be processed by a single SM or a subset of SMs. The control system needs to restrict the SM power references to these limits, hence, accurate knowledge of the power limits is important. In existing methods to derive the power limits, the SM capacitor voltages are assumed to have negligible ripples, whereas in practice the ripples can be considerable. This paper analyzes the effect of capacitor voltage ripples on the SM active power control limits and highlights the importance of considering the ripple effect. A methodology is proposed to accurately incorporate capacitor voltage ripples in the derivation of SM active power control limits. Simulation and experimental results are provided to evaluate the effectiveness of the proposed methodology. Accepted version This work was supported by the Office of Naval Research U.S. under DUNS Code: 595886219. It has also been partially supported by the Spanish Centre for the Development of Industrial Technology (CDTI) through the "Cervera" program under the grant agreement CER-20191002 ENERISLA.

Arm inductances and the operation of two arms of a phase leg in an alternate arm converter (AAC) can lead to hard-switching of the director switches (DSs) during steady-state operation, increasing voltage stresses across the DSs. The DS voltage stress also depends on the magnitude of the interrupted arm current, which, in turn, depends on the output active/reactive power. Hard-switching of the DSs limits the operating region of the AAC. This article characterizes the zero-current switching (ZCS) capability of the AAC and proposes extended ZCS operation in steady state for HVDC applications. This is achieved by coordinating the AAC operating point and the transformer on-load tap changer (OLTC). The coordinated operation utilizes the tap positions of the HVDC transformer effectively to extend the ZCS operating region with no added effort on circulating current control. Results based on an AAC-HVDC transmission system demonstrate the effective coordination of the transformer OLTC and the converter operating point to achieve extended ZCS performance.

In this article, the effect of large double frequency capacitor voltage ripple (CVR) on harmonic performance, efficiency, and capacitor lifetime in the cascaded H-bridge low capacitance static reactive power compensator (StatCom) (LC-StatCom) is analytically determined. With insight provided by the analysis, an LC-StatCom with modular switched capacitors is proposed that provides a degree of freedom to control the CVR magnitude. The premise of the operation is to keep redundant capacitor modules in standby mode when operating with lower currents. In addition, it is shown that by distributing losses between additional dc-side switches and the main H-bridge switches, the proposed concept provides opportunities for choosing an optimal hybrid combination of semiconductor technologies. The proposed concept is evaluated using a simulated 8.5 MVA StatCom and feasibility of the proposed system is confirmed by experiments on a seven-level 0.8 kVA single-phase LC-StatCom prototype.

Hybrid modular multilevel converters (HMMC) address the DC-fault blocking limitations of the half-bridge submodules (HB-SMs) of the standard MMC by combining HB-SMs with full-bridge submodules (FB-SMs). In order to improve the overall conversion efficiency, this article proposes two low-loss configurations for the HMMC. The main improvement in the proposed HMMCs is achieved by the combination of low-loss unipolar and low-loss bipolar SMs in the same arm of the HMMC. It is shown that the simplest structure (LLH1) can reduce the SM losses (switching and conduction losses in an SM) by 30% compared to the HMMC at the cost of limited fault blocking capabilities. The fully controlled structure (LLH2) reduces SM losses by 10% compared to the HMMC, and 30% compared to the FBSM-based MMC. These results represent an increase of 20% over the typical HBSM-based MMC for a converter (LLH2) that can provide fault-blocking capabilities. Assessment of efficiency in both HMMCs is provided over a range of operating conditions both in inverter and rectifier mode from an 800-MVA HVDC system model. Published version This work was supported by the Australian Research Council’s Discovery Grant DP210102294.

To reduce stored capacitor energy in modular multilevel converters (MMCs), previous papers propose injection of harmonics in the arm circulating currents and zero-sequence voltages. While this approach is effective, previously utilized combinations of injected harmonics significantly increase converter current ratings. In contrast, the optimization approach developed in this article identifies harmonics that simultaneously achieve capacitor energy optimization and reduced overrating of converter currents. In addition, the proposed approach eliminates the possibility of convergence to local minima, which is a significant improvement on previously proposed nonconvex optimization approaches. Experimental verification of the proposed approach is performed on a low-voltage three-phase modular multilevel converter.

This article discusses the control of large-scale grid-connected photovoltaic power plants (GCPPPs) operating under unbalanced grid voltage sags. The positive and negative sequences of the output currents are controlled to achieve different targets—injecting constant power to the grid or to the ac side of the converter, i.e., including the filter and the grid. Traditionally, synchronization with the grid voltages is required, which is usually performed by a phase-locked-loop (PLL) technique. In this article, the proposed control technique does not require any grid voltage synchronization. An arbitrary angle is used instead with the only requirement of having a frequency equal or close to the grid frequency. The fault-ride-through capability of the GCPPP during unbalanced voltage sags is addressed by proposing a current limiter. Simulation and experimental results verify the performance of the proposed GCPPP.

Power devices may become damaged or even fail completely due to over-current caused by external factors such as ac line transients, mechanical overload, misfiring, inverter shoot-through, etc. Some of these incidents can result in a very high current (few times higher than the system’s rated current) flow through the electrical drive system. Electrical machines have the capability to withstand very high current for relatively longer time duration (milliseconds to seconds depending on the size of the machine). On comparison, power devices, especially IGBTs, can withstand short-circuit current only for very short time durations in the order of microseconds and prolonged exposure can easily damage the power device. Industrial application requires proper short-circuit fault detection and protection circuits to protect the IGBTs from fault currents. Therefore, this article presents the fault detection circuit is based on monitoring the collector-emitter voltage using external collector capacitor, and the protection circuit is based on softly turning off the gate voltage using a current diode. The proposed method reduces power dissipation, temperature rise and prevents damage of the drive system.

Voltage source multilevel inverters with reduced leakage current, single-stage voltage step-up feature, compact design, and an efficient performance are a promising technology for high-frequency ac (HFac) microgrids feeding through renewable energy sources. This article proposes a novel single-source common-grounded (CG) step-up nine-level (9L) inverter, which can be applied in HFac microgrid applications. The proposed CG-based boost inverter is comprised of only nine switches (9S) and three self-balanced capacitors. Using the switched-capacitor (SC) technique, a double voltage boosting feature within a single power processing stage is achieved, while the leakage current concern is eliminated due to a CG-based configuration between the input dc source and the null of the grid. With the help of an LC input filter, the input current profile is free from large discontinuous inrush spikes. The working principles of the proposed 9L9S-CGSC inverter are discussed in this article. The modulation and closed-loop control strategy, as well as a comparative study, are presented. Finally, the open and closed-loop grid-tied performances of the proposed topology are evaluated by both simulation and experimental results obtained from a 1.2-kW laboratory-built prototype.

Model predictive control (MPC) methods are popularly employed in modular multilevel converters (MMCs) due to their fast dynamic response and multiobjective control capability. However, they present some inherent problems, such as computational complexity, variable switching frequency, poor steady-state performance, and tedious weighting factor selection. This article develops a deadbeat predictive current control method for MMCs. This method can realize the reference tracking of ac current and circulating current in one sampling period without error, and thus provide a fast dynamic response as conventional MPC methods. Besides, switching state or voltage level evaluation, cost function calculation as well as weighting factor selection are not required. Therefore, it has a very low calculation burden, which is independent of the number of submodules (SMs). Since a modulation stage is utilized, a fixed switching frequency and consequently a satisfactory steady-state performance are obtained. The effects of time delay, parameter mismatch, and SM capacitor voltage ripple on the control algorithm are discussed. Also, the corresponding improvement measures are provided to further enhance the steady-state performance and system stability of MMCs. The effectiveness and performance of the developed control algorithm are verified by experimental results. National Research Foundation (NRF) This work was supported by the National Research Foundation, Prime Minister’s Office, Singapore under the Energy Innovation Research Programme (EIRP) Energy Storage Grant Call and administrated by the Energy Market Authority under Grant NRF2015EWTEIRP002-007.

Negative- and zero-sequence internal currents of a modular multilevel converter (MMC) under unbalanced ac-grid conditions can increase the peak voltage of the submodule (SM) capacitors, which should be kept below a maximum voltage limit. This paper investigates the impact of offset pulsewidth modulation (OPWM) and zero-sequence voltage injection on reducing peak SM capacitor voltages of the MMC during unbalanced ac-grid conditions. It is demonstrated that OPWM extends the operating range of the MMC for a given set of restrictions, as it leads to a reduction of capacitor voltage in every phase by utilizing all the SMs in the arms. Zero-sequence voltage injection further reduces the maximum SM capacitor voltage among three phases under certain conditions. Simulation results from an 800-MVA MMC-based high-voltage direct current transmission system demonstrate the effect of OPWM in the operation of the converters and the efficacy of the method compared to standard modulation methods.

Model predictive control has emerged as a promising approach to govern modular multilevel converters (MMCs), due to its flexibility to include multiple control objectives and simple design process. However, this control scheme presents relevant issues, such as high computational complexity and variable switching frequency. This work proposes a sequential phase-shifted model predictive control (PS-MPC) for MMCs. The key novelty of this proposal lies in the way the predictive control strategy is formulated to fully exploit a phase-shifted pulsewidth modulation technique through an appropriate choice of synchronized average models for each carrier. In this way, the proposed predictive controller obtains independent optimal modulating signals for each carrier in a sequential manner, by solving an optimization problem with reduced computational effort independent of the number of submodules. This sequential optimization allows one to formulate the optimal control problem to achieve multiple control objectives, similarly to the finite-control-set MPC (FCS-MPC). Nevertheless, the MMC governed with the proposed PS-MPC generates an output voltage with fix-spectrum and operates with an even power loss distribution among semiconductors in steady-state, outperforming the standard FCS-MPC strategy. Experimental results are provided to verify the proposed PS-MPC effectiveness when governing a three-phase MMC with four half-bridges per stack.

In a modular multilevel converter (MMC) based battery energy storage system (BESS), a fault tolerant design ensures uninterrupted operation of the MMC when a given number of submodules (SMs) have faulty batteries or no batteries. This paper quantitatively investigates the fault tolerance improvement in MMC-based BESSs with different numbers of redundant SMs, which is commonly practiced to improve the fault tolerance in modular converter topologies. Simulation results are obtained to verify the proposed analysis. The presented analysis provides guidelines for designers to choose an appropriate number of redundant SMs to achieve a desired fault tolerance. Accepted version This work was supported by the Office of Naval Research U.S. under DUNS Code: 595886219.

DC microgrids with photovoltaic (PV) systems often incorporate a battery energy storage system (BESS) to regulate the dc bus voltage fluctuations due to the intermittent irradiance changes and load transients. Traditional control schemes do not consider the battery charging rate, leading to high current stress and shortening the battery lifetime. In this paper, a coordinated control for a PV system and the BESS is proposed, which implements a deterministic rule-based control strategy that regulates the battery charging rate depending on the available PV power reserve and the battery state-of-charge. Furthermore, the proposed control considers the PV system as the primary dc voltage regulator and treats the BESS as a secondary voltage regulating resource. The performance of the proposed control is investigated via simulation results. Ministry of Education (MOE) Submitted/Accepted version This work was supported by the Singapore Ministry of Education Academic Research Fund Tier 1 under Grant No: 2019-T1-001-168. It was also supported by the Basque Country Government under the project ENSOL2 (Development of Advanced PV Technologies Grant No: KK-2020/00077).

This paper expands a previous study regarding application of modular variable filter inductor in a cascaded H-bridge low-capacitance StatCom (LC-StatCom). In this paper, the benefit of having such a filter to expand the operating capability of the LC-StatCom into the inductive region is demonstrated. A comparison between the modular filter inductor and thyristor bypassed series inductor solutions is performed through derivation of analytic expressions. The added capacity to operate in the inductive region is also validated via experimental results.

This paper proposes a multi-input linear control law based on the incremental passivity theory for cascaded H-bridge (CHB)-based battery energy storage systems (BESSs). The proposed control law guarantees large-signal stability and controls multiple state variables without assuming dynamic decoupling between the voltages and the currents. Assuming dynamic decoupling is generally not acceptable in low-capacitance converters. Furthermore, the broad range of operating conditions in a CHB-based BESS due to the varying state of the batteries and varying grid requirements, makes it important to consider the nonlinear nature of the system. This paper presents a passivity-based control that ensures the global stability despite changing operating conditions. Simulation results on a single-phase CHB-based BESS are shown to corroborate that the proposed control approach exhibits excellent performance.

Intermittent renewable solar photovoltaic (PV) sources cause reliability and power quality issues in the power system. To alleviate these issues, flexible power point tracking (FPPT) algorithms were introduced. The secant-based FPPT algorithm does not require tuning of any parameter, making it a reliable control algorithm whose performance remains unaffected even after PV modules degradation. This paper focuses on the calculation of initial parameters and the implementation of the secant method-based FPPT algorithm considering PV panel degradation. Simulation and experimental comparisons are made between a conventional FPPT algorithm based on adaptive voltage step-based perturb and observe (P&O) method and the secant method-based algorithm during normal and degraded panel state of operation.

© 1986-2012 IEEE. Expansion of high-voltage dc (HVdc) systems to multi-terminal HVdc (MT-HVdc) systems/grids considerably increases the short-circuit levels. In order to protect the emerging MT-HVdc systems/grids against fault currents, proper dc fault current limiters (FCLs) must be developed. This paper proposes an innovative high inductance solid-state dc-reactor-based FCL (HISS-DCRFCL) to be used in HVdc applications. In fact, during the HISS-DCRFCL normal operation, its inductance value is extremely low, and its value becomes considerably high during the fault period, which decreases the fault current amplitude. The proposed HISS-DCRFCL performance is analyzed by MATLAB/Simulink and the simulation results are verified and confirmed by laboratory experimental results using a scaled-down laboratory prototype setup.

In this paper, a cascaded H-bridge low-capacitance StatCom (LC-StatCom) with a modular inductive filter is introduced. Replacing the fixed-value filter inductors with thyristor-switched reactors, a well-developed member of the static VAR compensators family, reduces the overall energy storage capacity and voltage rating of the LC-StatCom without violating standard limits on current quality. The proposed modular inductive filter takes advantage of LC-StatCom's ability to synthesize high-quality ac voltage to reduce the overall energy storage requirement of the filter inductance. The proposed modular filter inductor concept adds an additional degree of freedom to control the maximum voltage drop on the filter inductor by changing the inductance value. This additional capability decreases the overall voltage rating of the converter. The effects of adding the modular inductor unit on the I-V characteristic of the LC-StatCom are evaluated. The effectiveness of the proposed solution is demonstrated by experimental results on a seven-level 0.7-kVA LC-StatCom. MOE (Min. of Education, S’pore)

Customers of manned and unmanned aircraft are moving towards using more hybrid electric propulsion systems (see Figure 1) because these systems are flexible, reduce carbon emissions, and optimize fuel consumption. They are also lighter and take up less space, with lower noise and vibration levels, and reduced maintenance costs.

This paper presents a novel hybrid neutral-point-clamped (NPC) dual–active-bridge (DAB) converter for battery energy storage systems. The outer switches of the topology are SiC MOSFETs, while the inner switches are Si IGBTs. Compared with the traditional DAB converter, the NPC-based topology shows significant advantages including reduced voltage stress for each switch and lower electromagnetic interferences, making it suitable for high voltage applications. Combined with wide-bandgap semiconductors, the hybrid converter can achieve better efficiency under high frequency operation with a trivial increase in overall cost. A control method for the proposed hybrid NPC DAB converter is also introduced in this paper. Simulation results and analysis for a 1500-V, 150-kW battery energy storage system are presented.

In the conventional cascaded H-bridge-based splitbattery energy storage (CHB-SBES) system, the dc-bus voltages are measured for state-of-charge (SoC) balancing and charge/discharge control of battery packs, and multilevel voltages are sensed for open-circuit (OC) fault detection in the submodules. In this paper, a new control approach is proposed where the multilevel voltage measurement of the CHB-SBES system alone is utilized for control (i.e., SoC balancing and charge/discharge control) as well as fault detection. The dc-bus voltage of each submodule is estimated from the measured multilevel voltages, gating signals and grid currents for control purposes. Further, to localize OC faults within a fundamental line cycle, a simplified fault detection method is proposed using the estimated dc-bus voltages. The proposed method eliminates n dc-bus voltage sensors per phase and the associated sensor power supplies in CHB-SBES system, where n is the number of submodules per phase. Results from MATLAB-Simulink model are presented to validate the proposed method.

A dc solid-state power controller (SSPC) is a semiconductor-based circuit breaker used for fault isolation in aerospace applications. Device selection is important to ensure the reliability and performance of the SSPC. In this paper, Si, SiC, and GaN field-effect transistors are compared under steady-state and transient conditions. Experimental results are presented to evaluate the performance and characteristics. Nanyang Technological University National Research Foundation (NRF) Accepted version This work is jointly funded by the National Research Foundation (NRF) of Singapore, Rolls-Royce Singapore Pte. Ltd, and Nanyang Technological University, Singapore.

The increasing importance of cascaded multilevel converters (CMCs), and the sub-category of modular multilevel converters (MMCs), is illustrated by their wide use in high voltage DC connections and in static compensators. Research is being undertaken into the use of these complex pieces of hardware and software for a variety of grid support services, on top of fundamental frequency power injection, requiring improved control for non-traditional duties. To validate these results, small-scale laboratory hardware prototypes are often required. Such systems have been built by many research teams around the globe and are also increasingly commercially available. Few publications go into detail on the construction options for prototype CMCs, and there is a lack of information on both design considerations and lessons learned from the build process, which will hinder research and the best application of these important units. This paper reviews options, gives key examples from leading research teams, and summarizes knowledge gained in the development of test rigs to clarify design considerations when constructing laboratory-scale CMCs. Published version This work was supported in part by The University of Manchester supported by the National Innovation Allowance project ‘‘VSC-HVDC Model Validation and Improvement’’ and Dr. Heath’s iCASE Ph.D. studentship supported through Engineering and Physical Sciences Research Council (EPSRC) and National Grid, in part by the Imperial College London supported by EPSRC through the HubNet Extension under Grant EP/N030028/1, in part by an iCASE Ph.D. Studentship supported by EPSRC and EDF Energy and the CDT in Future Power Networks under Grant EP/L015471/1, in part by University of New South Wales (UNSW) supported by the Solar Flagships Program through the Education Infrastructure Fund (EIF), in part by the Australian Research Council through the Discovery Early Career Research Award under Grant DECRA–DE170100370, in part by the Basque Government through the project HVDC-LINK3 under Grant ELKARTEK KK-2017/00083, in part by the L2EP research group at the University of Lille supported by the French TSO (RTE), and in part by the Hauts-de-France region of France with the European Regional Development Fund under Grant FEDER 17007725.

The modular multilevel converter (MMC) is a promising option to integrate battery energy storage systems (BESSs) into the power system. Both half-bridge submodules (SMs) and full-bridge SMs can be used to implement an MMC. For MMC-based BESS, it is important to have sufficient battery fault tolerance, which means the system can operate normally even when some SMs have faulty batteries or no batteries. This paper analyzes and compares the battery fault tolerance of MMC-based BESSs with half-bridge and full-bridge SMs. According to the quantitative comparison, the MMC with full-bridge SMs has considerably higher tolerance to battery faults when the active power requirement is relatively high. Simulation and experimental results are provided for the verification of the proposed analysis. Accepted version This work was supported by the Office of Naval Research U.S. under DUNS Code: 595886219. It has also been partially supported by the Spanish Centre for the Development of Industrial Technology (CDTI) through the "Cervera" program under the grant agreement CER-20191002 ENERISLA.

The modular multilevel converter (MMC) is currently one of the power converter topologies which has attracted more research and development worldwide. Its features, such as high quality of voltages and currents, high modularity and high voltage rating, have made the MMC a very good option for several applications including high-voltage dc (HVdc) transmission, static compensators (STATCOMs), and motor drives. However, its unique features such as the large number of submodules, floating capacitor voltages, and circulating currents require a dedicated control system able to manage the terminal variables, as well as the internal variables with high dynamical performance. In this paper, a review of the research and development achieved during the last years on MMCs is shown, focusing on the challenges and proposed solutions for this power converter still faces in terms of modeling, control, reliability, power topologies, and new applications.

In this paper, the input-output feedback linearization (IOFL) theory is applied to modular multilevel converter (MMC) dynamics to design the initial control strategy. Then, direct Lyapunov method is used to complete the control strategy by attaining several effective low pass filters (LPFs). In the process of achieving LPFs, global stability of the considered MMC-based high voltage dc (HVDC) system is guaranteed through the d and q components of both MMC output and circulating currents dynamics. To this end, the errors of proposed control functions with suitable Lyapunov coefficients are used to shape the energy function. Simulation results in MATLAB/SIMULINK environment are provided to verify effectiveness of the proposed control strategy at reaching a good dynamic response for a MMC-based HVDC system under fault condition.

The frequency response support has been added to the new standards and grid codes for the grid-connected photovoltaic (PV) systems, to retain the reliability and quality of the power system under the high penetration of renewable energy resources. This paper proposes an algorithm for the control of cascaded H-bridge (CHB)-based PV systems to achieve frequency response for them. The required power reference, based on the grid operation condition, is distributed among the sub-modules (SMs) of the CHB converter considering the available power from each SM and operational constraints of the system. The details of the proposed control algorithm are provided, while its effectiveness is evaluated on a 1.5-MW PV simulation setup, connected directly to a 6.6-kV grid.

Low losses are a major advantage of the modular multilevel converter (MMC) in high-power applications. Losses on the MMC depend on a number of parameters such as switching frequency, voltage balancing algorithm, the topology of the sub-module (SM). This paper investigates the impact of different power factors in the losses of different MMC SMs with a focus on HVDC applications. Considering 27 different SM topologies, we demonstrate that the operation mode of the converter (inverter / rectifier) and the power factor affect not only the average losses but also the minimum and maximum losses within a period due to the voltage balancing requirements.

In operation of the modular multilevel converter (MMC)-based battery energy storage system (BESS), different submodules (SMs) may be required to provide a different amount of active power, which is defined as inter-SM active power disparity in this paper. This happens in various conditions, for example, when some SMs have faulty batteries and thus, cannot process any active power. This paper proposes a general analysis of the inter-SM active power disparity limits of the modular multilevel converter-based battery energy storage systems. An analytical method is provided to derive the maximum/minimum power that any subset of SMs in one arm can provide. Based on the derived results, the active power limits of SMs are nonlinear with the number of SMs. Both simulation and experimental results are provided, which verify the proposed analysis and method. The proposed analysis facilitates the design and operation of the MMC-based BESSs. Submitted/Accepted version This work was supported by the Office of Naval Research U.S. under DUNS Code: 595886219.

Due to a dramatic increase in grid-connected renewable energy resources, energy storage systems (ESSs) are interesting and important for future power systems, among which the modular multilevel converter (MMC)-based battery energy storage systems (BESSs) are one of the most modular, efficient and flexible topologies. Uneven active power distribution among sub-modules (SMs) in the arms of an MMC-based BESS is necessary for certain applications. The main contribution of this paper is to present a general analysis of the inter-SM active power disparity problem which incorporates the inherent operational constraints of the MMC converter. An analytical method to derive inter-SM active power disparity limits is introduced. The proposed analysis can help facilitate the design of MMC-based BESS for applications such as recycled batteries and hybrid battery chemistries, which can both require significant inter-SM active power disparity. The analysis formulates a criteria vector and criterion value that describes whether an MMC-based BESS is capable of supplying demanded output powers while subject to inter-SM active power disparity. Simulation and experimental results are obtained on a single-phase system with varying numbers of SMs per arm, which verifies the feasibility and generality of the proposed analytical method. Accepted version This work was supported by the Office of Naval Research U.S. under DUNS Code: 595886219.

The Vienna rectifier is an attractive converter solution due to the three-level voltage generation and its simple structure. When the Vienna rectifier operates with nonunity power factor, the reference voltage and the input current have different signs during some intervals around the current zero crossings. This creates low-frequency distortion in the current waveforms. One of the preferable methods to reduce this distortion is the zero sequence injection which, however, risks the converter entering into overmodulation. This paper analyses the above distortion and introduces the operation of the Vienna rectifier in two modes, which includes injecting a proper zero sequence and reactive power compensation. This allows the converter to operate in a wide range of power factors without constraining the modulation index. The required reactive current is obtained analytically from the instantaneous values of the converter at any operating point. National Research Foundation (NRF) Accepted version This work is jointly funded by National Research Foundation (NRF) Singapore, Rolls-Royce Singapore Pte. Ltd, and Nanyang Technological University, Singapore.

This paper proposes a dc-link voltage shaping method for a cascaded H-bridge (CHB) static synchronous compensator (StatCom). A recently proposed low capacitance-StatCom system, which intentionally operates with large voltage ripples on the dc-link capacitors, offers the advantage of superior harmonic performance. However, the capacitor voltage ripples decrease when operating at below-rated reactive current, which removes the aforementioned harmonic performance benefit of this system. In addition, such harmonic performance benefit is only achieved in capacitive operation mode. In order to expand the operating region where advantageous voltage ripples are present, a new voltage shaping method is proposed. The proposed method uses a CHB multilevel converter coupled with simple dc-dc converters to shape voltage ripples on the dc-link capacitor regardless of its operating point. This is achieved by controlling the average current of the dc-dc converter using model predictive control (MPC). The concept is best applied to an enhanced StatCom, or E-StatCom, application in which the StatCom is integrated with either a renewable energy source or energy storage system. The operational principle of the proposed approach is validated via simulation and experimental results on a five-level single-phase CHB StatCom. MOE (Min. of Education, S’pore) Accepted version

Power semiconductor devices are vulnerable to thermomechanical fatigue due to temperature cycling caused by system load profile and external climatic conditions. As the reliability performance of power semiconductor devices in power converter systems is determined by this temperature stress, accelerated power or thermal cycling test are used in this article to emulate the temperature stress. The failure mechanisms due to temperature stress can be studied, and it also helps to develop the lifetime estimation model for power semiconductor devices. In the past, active power cycling and passive thermal cycling tests are investigated separately to develop the failure mechanism model based on the device's electrical parameter changes and scanning electron microscopic (SEM) analysis. However, there is no detailed report on, how different temperature stresses emulated by dc, pulsewidth modulation (PWM) power cycling, and thermal cycling affects the device physically, and how much changes it introduces in the device's electrical parameters. Therefore, this article presents an experimental investigation of active dc, PWM power cycling and passive thermal cycling approaches on 1.2-kV 50-A fast trench insulated gate bipolar junction transistor (IGBT) devices. The device electrical parameters, such as ON-state voltage, threshold voltage, gate current, gate voltage, and thermal resistance, were monitored during the study to classify the effects of temperature stress produced by dc, PWM power cycling, and thermal cycling on these electrical parameters. National Research Foundation (NRF) This work was supported by the Rolls-Royce@NTU Corporate Lab through the National Research Foundation (NRF) Singapore under the Corp Lab@University Scheme.

The alternate arm converter (AAC) is an emerging fault-tolerant multilevel converter topology from the same family of multilevel converters as the modular multilevel converter (MMC). Due to the alternate operation of the converter arms, energy balancing in the AAC is not continuous, but restricted to small time intervals. This paper develops a gradient-based current control and energy-balancing method for the AAC. The proposed strategy enforces the dynamic limits on the redundant submodules (SMs) during the overlap period and allocates effectively the maximum available number of redundant SMs to control the circulating current. The choice of the gradient as the circulating current control parameter improves the energy regulation capability of the AAC, and the enforcement of dynamic limitations avoids distortions of the output voltage. Results from an AAC-based HVDC converter model derived from the CIGRE benchmark MMC system demonstrate that the proposed strategy delivers improved energy control and balancing with good harmonic performance compared to existing current control methods for the AAC while also maintaining zero-current switching of the director switches of the AAC arms.

For power converters with inductive loads, a freewheeling path is needed for the current due to reactive power. The MOSFET synchronous rectification (SR) is widely used to reduce the conduction loss during the freewheeling period. Due to the wide band gap of silicon carbide (SiC), the intrinsic body diode of SiC MOSFET exhibits a high voltage drop. Hence, an antiparallel SiC Schottky diode is normally implemented to eliminate its conduction. However, the external SiC Schottky diode is not fully utilized as it only works during the dead time. In this paper, the hard-switching SR is investigated in an SiC three-phase inverter and compared with a conventional inverter using freewheeling diode (FWD). An improved power loss model for the two inverters has been developed. It is found that the inverter using SR has higher efficiency due to the smaller switching loss. A 7-kW prototype of SiC three-phase inverter is built, which achieves a peak efficiency of 98.8% (±0.15%) and 98.5% (±0.15%) at 40 kHz using SR and FWD, respectively. This paper confirms that the SiC MOSFET is an ideal candidate for the SR. NRF (Natl Research Foundation, S’pore)

Estimation-based indirect dc-voltage control in MMCs interacts with circulating current control methods. This paper proposes an estimation-based indirect dc-voltage control method for MMC-HVDC systems and analyzes its performance compared to alternative estimations. The interactions between estimation-based indirect dc-voltage control and circulating current control methods, active/reactive power regulation are also investigated. The proposed method delivers similar performance to measurement-based direct dc-voltage control, regardless of the circulating current control method. Steady-state and transient performance is demonstrated using a benchmark MMC-HVDC transmission system, implemented in a real-time digital simulator. The results verify the theoretical evaluations and illustrate the operation and performance of the proposed indirect dc-voltage control method.

The cascaded H-bridge (CHB) low-capacitance StatCom (LC-StatCom) has a limited operating area in the inductive region compared to a conventional StatCom's V–I characteristic. This limitation for operation in the inductive region is considered to be the biggest disadvantage of CHB LC-StatCom. In this paper, the effect of adding parallel and series reactors on the LC-StatCom system's V–I characteristic is analyzed. Then, a new configuration, which fully compensates for the lost operating area of the LC-StatCom, is introduced. A scaled down single-phase seven-level laboratory prototype is used to confirm practicability of the proposed system.

The maximum-allowable voltage/energy ripple and peak arm current define the operating limits of a modular multilevel converter (MMC). Furthermore, under unbalanced ac-grid conditions, the control targets of a power electronics converter with regards to balanced active power, reactive power or grid currents affect the power capabilities and operating region of the MMC. The objective of this paper is to investigate and quantify the operating region of an MMC under unbalanced ac-grid conditions and the impact of circulating current control and system control targets on the limits of the MMC operating region. It is demonstrated that higher order harmonic injection in the circulating current through a reference calculation based on instantaneous information extends the operating region of the MMC under grid imbalances, reducing capacitor voltage ripples compared to a direct elimination of the second order harmonic regardless of the converter control target. The efficacy of both circulating current control methods is validated through real-time digital simulations of an 800 MVA benchmark MMC-based high-voltage dc (MMC-HVDC) transmission system.

High power density is required for power converter in more electric aircraft due to the strict demands of volume and weight, which makes silicon carbide (SiC) extremely attractive for this application. In this paper, a prototype of 50-kW SiC two-level three-phase voltage source inverter is demonstrated with a gravimetric power density of 26 kW/kg (without inclusion of filter). A gate assisted circuit is introduced to reduce the switching loss. In addition, the ringings of voltage and current due to parasitic parameters during the switching transition can also be mitigated. A mathematical model with consideration of various parasitic parameters is developed, which illustrates the parasitic effects in high-speed switching SiC power module. The converter is operated at a switching frequency up to 100 kHz and a narrow dead band of 250 ns. The measured efficiency is 97.91%.

Low-voltage ride-thorough capability is among the challenges in the operation of medium- and large-scale grid-connected photovoltaic power plants (PVPPs). In addition, reactive power injection during voltage sags is required by power system operators in order to enhance the voltage of the point of common coupling. The performance of medium- and large-scale grid-connected PVPPs during these events is studied. An algorithm for the calculation of current references, in the dq -frame, during voltage sags is introduced, which considers the inverter current limitation, grid code requirements and the amount of extracted power from photovoltaic strings. The proposed algorithm uses the full current capacity of the inverter in injecting active or reactive powers to the grid during voltage sags, which leads in a better grid voltage enhancement. The performance of proposed control strategies is investigated on a 150-kVA PVPP connected to the 12.47-kV medium-voltage test-case system simulation model during different fault conditions. An experimental setup of the 3.3-kVA grid-connected three-level neutral-point-clamped inverter with a dc/dc converter illustrates and validates the performance of the controller in injecting required active/reactive power and supporting the network voltage.

This paper introduces a modulation method for the stacked multicell converters (SMCs). The proposed method is implemented using phase-disposition pulse width modulation and is capable of balancing and regulating the voltages of all the capacitors in the topology, i.e., the flying capacitors and the dc-link capacitors. The proposed method is also able to eliminate the low-frequency voltage ripples that may appear in the neutral point (NP) of SMCs. In SMCs with two stacks, the NP voltage level can be generated by direct connection of the output to the dc-link NP, but also using two extra states available. This redundancy is used to regulate the NP voltage. Furthermore, since the proposed method can eliminate the low-frequency voltage ripples in the capacitors, the capacitances of all the capacitors of the SMCs can be reduced, while maintaining high quality of the output voltages and currents. This enables the use of film capacitors. Simulation and experimental results are presented from a three-phase five-level $2\times 2$ SMC to verify the effectiveness of the proposed method.

This paper presents a fault-tolerant configuration for the modular multilevel converter (MMC). The procedure is able to detect faults in voltage sensors and semiconductor switching devices, and it can reconfigure the system so that it can keep on operating. Both switch and sensor faults can be detected by comparing the output voltage of a set of submodules (SMs), which is measured by a so-called supervisory sensor, with two calculated reference voltages. Faults in the supervisory sensors are also considered. Sensor faults are overcome by using a measuring technique based on estimates that are periodically updated with the voltage measurements of the supervisory sensors. Additional SMs are included in the arms so that the MMC can bypass a faulty SM and continue operating without affecting the output voltage of the phase-leg. Experimental results obtained from a low-power MMC prototype are presented in order to demonstrate the effectiveness of the proposed techniques.

A low capacitance cascaded H-bridge static compensator (StatCom) with additional switches on the dc-side is presented in this paper. The switching capability of the dc capacitors provides opportunities for choosing optimal semiconductor technologies by distributing the losses between the dc-side switches and the main H-bridge switches. Having additional switches on the dc-side helps to easily modularize the capacitors and control the ripple on the capacitors voltages. Simulation study on an 8.5-MVA StatCom system is used to confirm the viability of using modular switched capacitors in the low capacitance cascaded H-bridge StatCom systems.

In this paper, a cascaded H-bridge low capacitance StatCom with modular capacitors is proposed. The low capacitance StatCom benefits from having large capacitor voltage ripple to reduce losses and improve harmonic performance. The proposed LC-StatCom can operate with large capacitor voltage ripple even in light loading conditions by keeping redundant capacitor modules in standby mode when the current is low. Effectiveness of the proposed system is confirmed using a simulated 8.5-MVA StatCom system.

The use of an inter-cell voltage balancing scheme to evenly distribute the total dc-link voltage among the multiple floating capacitors is crucial in modular multilevel cascaded converters (MMCs). This paper presents an intuitively simple and computationally efficient sorting-based modulation algorithm for capacitor voltage balancing applicable to any MMC. The proposed modulation stage is inherently decoupled from the upper-level control scheme and it is able to both generate the required converter output voltage and balance the capacitor voltages suitably. Furthermore, it maintains a constant harmonic performance even as the number of switching transitions is varied to achieve voltage balance under different loading conditions with minimum incurred switching losses. The effectiveness of the proposed algorithm is validated on an experimental seven-level 350-VA single-phase cascaded H-bridge working as a static compensator. In addition, a simulated 350-VA system is used to obtain complimentary results. Accepted version

The papers in this special section focus on the latest achievements on MMCs regarding the development of new circuit topologies, modeling, operation, and fault analysis. Modular multilevel converters (MMCs) have emerged as an attractive solution for high-voltage high-power applications, such as high-voltage direct current (HVdc) transmission systems, due to their attractive features such as modularity, reliability, high voltage capability, and small footprint. However, new power converter topologies and recent advances in terms of control have expanded the application of the MMC to power conditioning and machine drives, among others.

Load imbalances in the supply of passive loads with modular multilevel converter (MMC)-based medium (MVDC) and high voltage (HVDC) dc-links are inevitable. In such applications, the maximum-allowable voltage ripples and peak arm currents define the operating limits of the MMCs. This paper demonstrates the impact of circulating current control in capacitor voltage ripples of sub-modules and peak arm currents under unbalanced load conditions when supplying passive networks, comparing the effects of three circulating current control methods on internal variables of the MMCs. The efficacy of the circulating current control is validated through real-time digital simulations of an 800 MVA benchmark MMC-based HVDC transmission system. Accepted version

In this paper, an active shaping method of the capacitor voltage for a cascaded H-bridge (CHB) Iow-capacitance static synchronous compensator (LC-StatCom) is introduced. The traditional LC-StatCom is able to operate with large capacitor voltage ripples when it is operating with rated current. However, as the current is reduced below rated current, voltage ripple on the capacitors decreases. Decreasing the current therefore removes the advantages of the LC-StatCom such as better current quality and reduced switching losses. The active shaping method aims to keep consistent large voltage ripple on the capacitor using a simple boost converter cell to inject an appropriate auxiliary capacitor current. Simulation results are provided to confirm the performance of the proposed CHB-StatCom system. Accepted version

The circuit configuration of the modular multilevel converter (MMC) requires a large number of current and voltage measurements as well as communications within the converter arms and between the arm controllers and the main control circuit. In order to reduce circuit complexity and hardware requirements with their associated cost, while adding an additional level of reliability to the operation of the MMC, a number of methods have been proposed for the estimation / observation of the various internal electrical variables or parameters of the MMC. These include estimations for sub-module capacitor voltages, dc-link voltages, arm currents or total arm energy. Such methods aim to eliminate or reduce the sensors in the circuit, reduce communication requirements or both. This paper provides an overview and classification of the different estimation/observation methods for MMCs currently proposed in the literature.

The paper presents a subislanding approach based on two algorithms, a backtracking algorithm, which is used to detect the exact location of distributed generation based on renewable energy sources (DGRESs) to establish subislands in the distribution networks and a protection co-ordination algorithm, which is used to identify the fault location. The IEEE reliability busbar test system is used for algorithm qualification, with several case studies and sensitivity analyses employed to verify the proposed algorithms. The probabilistic-based analytical technique along with the customer interruption cost model is then used to evaluate reliability improvements. The results presented in the paper indicate that the proposed approach is effective in increasing the reliability of power distribution systems with high penetration of DGRESs while providing an online reliability assessment.