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DC collection network offers an attractive alternative to AC network for photovoltaic, as it avoids the charging current issues and reduces the size and weight. Variable voltage gain DC/DC converters play an important role in DC collection network. Two topologies suitable for photovoltaic DC collection are studied. Boost and LLC converter and active clamp isolated full-bridge boost converter are two converters with high and variable voltage conversion ratio suitable for the photovoltaic system. This work investigates the two converters comprehensively. The topologies are analysed so as to summarise and compare the characteristic of the converters. Soft switching condition is compared to help extend the zero voltage switching range. Voltage and current stress of the two converters are calculated. Loss comparison is made with the theoretical analysis. Advantages and disadvantages are summarised to get a deep insight into their application field.

Captured under the umbrella term Open Education, a wide range of educational initiatives has been popping up in the educational landscape. This study aims to offer empirical ground for understandin...

Transverse flux permanent magnet (TFPM) machines are a potential candidate for direct-drive wind power application due to high torque and power densities. The operating principle of TFPM machines is firstly described with various topologies available in literature, with the placement of magnets as a criterion for the classification of TFPM machine topologies. This review includes characteristics, power factor improvement, cogging torque minimization, material consideration, modelling techniques, and scalability. Different wind turbine concepts with direct-drive machines, control techniques and power converter topologies are also considered in this paper.

For a portable backup power system, there is an essential need to contribute to increasing the energy conversion efficiency between the source and the electrical household appliances to overcome the recent issues of global warming. This paper proposes a Backup power system (BPS) compatible with the capability to match with two primary power sources; Grid-Connected power as an AC and solar-PV as a DC power source. This system composes of a rechargeable battery bank of about 300V, while the voltage matching concept keeps maintaining the battery fully charged as long as the source power is available. Matlab-based simulation has performed to prove the concept of the adopted voltage-matching. A relay switch circuit controlled by the main power source is used to change-over the load/appliances between direct link through bypassing the main power and the storage battery power when both options of main power are unavailable. The result shows the excellent utilization of the traditional BPS losses, the proposed topology can achieve about 99% power efficiency as compared with the traditional one.

Subject of Research. The paper considers one of the possible approaches to the study of Ethernet networks by simulating them in the OMNeT ++ environment with the use of the INET framework. The possibility of studying network models is shown in both the step-by-step execution mode and the mode of obtaining generalized statistical characteristics of their operation. Method. When presenting the proposed approach, the method of sequential complication of network models was used, taking into account the features of existing standard protocols and network implementations. The simplicity of the proposed approach is shown, which is based on a wide range of ready-made components for the description of various network elements within the INET framework. This fact gives the possibility to form quite complex network models by means of only the graphic editor and the built-in NED network description language. A brief description of INET framework main components is given that makes it possible to form the structure of the network under research in the graphical editing mode. Main Result. The paper presents technique for creation of network simulation models with a sufficiently detailed description of the main modeling stages. The simplest methods for launching the network model into work and analyzing the results are considered. The work shows the possibility of creating custom component modules in the INET framework projects, which, being ready-made components, can be used in models of more complex network structures. Based on the generated approach, models were built of both basic and mixed Ethernet topologies that gave the possibility to carry out a sufficiently detailed analysis for each of these topologies. Practical Relevance. The described toolkit makes it possible to carry out research on the justification of design solutions for design of distributed computer networks, as well as for creation of tools supporting the automated design of infocommunication systems and networks.

A detailed survey of approaches reducing energy consumption of core networks is presented in this paper. We consider a multilayer architecture, in which the optical layer can be realized either with a Wavelength Division Multiplexing (WDM) network or an Elastic Optical Network (EON). We focus on the design and operation stages, i.e., deciding which devices to install in the network during the former step, and choosing which devices to put into sleep mode during the latter one. A taxonomy for classifying the surveyed approaches is provided in order to compare the works covering energy efficiency in core networks (in terms of both optimal formulations and heuristic solutions). Moreover, our work provides a global view of the traffic assumptions, the topologies, and the power consumption models in the literature. The need of further investigations in this field clearly emerges. We envision future works targeting: (1) more effective standardization efforts to practically realize sleep modes; (2) the evaluation of the impact of sleep mode on the device lifetime; (3) the extensive adoption of new paradigms like Software Defined Networking (SDN) and EON; and (4) a radical improvement in the testbed implementations.

In this work we propose randomly ordered polydomain nematic liquid crystal polymer networks to reversibly generate notable jagged relief patterns at a polymer coating surface by light illumination. The domain size is controlled by the addition of traces of partly insoluble fluorinated acrylate. The photoresponse of the coating is induced by a small amount of copolymerized azobenzene monomers. Upon exposure to UV light, azobenzene undergoes trans to cis isomerization, resulting in a change in molecular order and packing within each domain. The extent of this effect and its directionality depends on the domain orientation. Localized to domain level, this morphological change forms large 3D spikes at the surface with a modulation amplitude of more than 20% of the initial thickness. The process is reversible; the surface topographical patterns erase within 10 s by stopping the light exposure. A finite element model is applied to simulate the surface topography changes of the polydomain coating. The simulations describe the formation of the topographic features in terms of light absorption and isomerization process as a function of the director orientation. The random director distribution leads to surface structures which were found to be in close agreement with the ones measured by interference microscopy. The effect of domain size on surface roughness and depth modulation was explored and related to the internal mechanical constraints. The use of nematic liquid crystal polydomains confined in a polymer network largely simplifies the fabrication of smart coatings with a prominent triggered topographic response.

Multilevel converters, such as the modular multilevel converter (MMC) or the alternate arm converter (AAC), rely on charged capacitors in their cells to generate their AC voltage waveform. Since the cell capacitors are physically large and occupy approximately half the cell volume, their capacitance must be kept minimal while limiting the voltage fluctuation caused by the current passing periodically through these capacitors. This study proposes a mathematical model which estimates the energy deviation for the stacks of both the MMC and the AAC during steady‐state operation under any power factor and for AC voltage magnitude fluctuation of up to ±10%. The analysis is then used to calculate the minimum size for the cell capacitors in order to keep their voltage fluctuation within set boundaries for both topologies. The results show that the MMC requires 39 kJ/MVA of capacitive energy storage under sinusoidal modulation but this reduces with triplen injection modulation. The AAC has a lower requirement for storage in its cells of 11 kJ/MVA but the AAC has a six‐pulse DC current ripple which requires a filter estimated to have a further 33% capacitive storage.

Asynchronous interconnect technology leveraging transition signaling bundled-data is gaining momentum as a promising solution for the chip-level connectivity of GALS (Globally Asynchronous Locally Synchronous) integrated systems. However, the scope of most previous bundled-data network-on-chip (NoC) validations is limited to NoC switches in isolation. Studies with a broader scope admittedly end up in unstable results because of the incompleteness or low-maturity of the synthesis flow for asynchronous NoCs. By investing in the development of a predictable and hierarchical composition tool flow of NoC switches, this paper aims at major depth and insight in the comparative assessment of a complete bundled-data NoC with a competitive synchronous counterpart, when targeting an ultra-low power technology library.

Power is a primary concern in modern circuits. Clock distribution networks, in particular, are an essential element of a synchronous digital circuit and a significant power consumer. Clock distribution networks are subject to clock skew due to process, voltage, and temperature (PVT) variations and load imbalances. A target skew between sequentially-adjacent registers can be obtained in a balanced low power clock tree using techniques such as buffer and wire sizing. Existing skew mitigation techniques in tree-based clock distribution networks, however, are not efficient in coping with post design variations, whereas the latest non-tree mesh-based solutions reliably handle skew variations, albeit with a significant increase in dissipated power. Alternatively, crosslink-based methods provide low power and variation-efficient skew solutions. Existing crosslink-based methods, however, only address skew at the network topology level and do not target low power consumption. Different methods to manage skew and skew variations within tree and non-tree clock distribution networks are reviewed and compared in this paper. Guidelines for inserting crosslinks within a buffered low power clock tree are provided. Metrics to determine the most power efficient technique for a given circuit are discussed and verified with simulation.

This paper presents a generalized multilevel direct power control (ML-DPC) scheme for grid-connected multilevel power converters. The proposed method extends the original DPC operating principle by considering only the closest subset of two-level voltage vectors to the present switching state. The implementation of this principle requires the power derivatives for feedback, which can present numerical problems when applied experimentally, mainly due to high measurement noise sensitivity. Therefore, a derivative estimator is proposed based on the converter–grid model in the synchronous reference frame. In addition, a virtual flux observer is developed to achieve synchronization and improve robustness in the presence of grid voltage harmonics. The proposed method is applicable to any multilevel converter topology of any number of levels. In this paper, simulations and experimental results are presented for a seven-level cascaded H-bridge converter.

Reforms in the electricity sector along with various renewable-energy-promotion policies have increased the importance of small grid-connected photovoltaic (PV) systems utilizing single-stage single-phase inverters. Ruggedness, reliability, and cost effectiveness are the desirable characteristics of such inverters used in distributed low-power applications. Schemes based on one-cycle control (OCC) which do not require the service of a phase-locked loop for interfacing the inverter to the grid are increasingly being employed for such applications. However, the OCC-based schemes reported earlier require sensing of the grid voltage which somewhat offsets one of the inherent strengths of OCC-based systems. In an effort to overcome the aforementioned limitation, an OCC-based grid-connected single-stage PV system is proposed in this paper which does not require to sense the grid voltage. Further, it requires less number of sensors (two) as compared to that required (four) in the earlier reported scheme for the implementation of the core controller comprising of OCC and maximum-power-point-tracking blocks. The viability of the proposed scheme is confirmed by performing simulation and experimental validation.

In this paper, two distinct types of tapped-inductor Z-source impedance networks are proposed for implementing high performance voltage-type inverters topologies with strong voltage boost inversion abilities and less components' stresses. All proposed topologies can in principle be unified into a generic network entity, which is termed hybrid-source tapped-inductor impedance network. The resulting novel Z-source inverters would have a higher output voltage gain and other unique advantages that currently have not yet been investigated. Theoretical analysis for explaining these operating features has already been discussed throughout the paper, before experimental results are presented for verifying them. It is anticipated that these advantages would help the formed inverters find applications in photovoltaic and other renewable systems, where a high voltage gain is usually requested.

—Matrix Converter (MC) is a modern direct AC/AC electrical power converter without dc-link capacitor. MC is operated in four quadrant, assuring a control of the output voltage, amplitude and frequency. The matrix converter has recently attracted significant attention among researchers and it has become increasing attractive for applications of wind energy conversion, military power supplies, induction motor drives, etc. Recently, different MC topologies have been proposed and developed which have their own advantages and disadvantages. Matrix converter can be classified as direct and indirect structures. The direct one has been elaborated in previous work. In this paper the indirect MCs are reviewed. Different characteristics of the indirect MC topologies are mentioned to show the strengths and weaknesses of such converter topologies.

Multilevel inverters represent a high potential for realization of high power controllable conversion systems of different nature-rectifiers, inverters, high power amplifiers, etc. From the even more applied three-level inverter to the multiple AC stages VSI, different topologies are applied, with an increasing quantity of possible levels. Usually, the theory of multilevel inverters is presented with different definitions of the number of levels. The contribution gives some logic definitions on basic schemes, and presents the various versions of the technique of one and multiple-phase multilevel inverter systems. >