Search

In this article, phase disposition pulse width modulation based reduced switching state multipoint clamped (MPC)-five level unidirectional rectifier has been proposed. The converter has been modeled and modulated similar to conventional MPC structured converter topologies without additional clamping diodes and flying capacitors. Besides that, the proposed topology has minimum total blocking voltage, thereby reducing losses and improved efficiency. Moreover, it enhances the system reliability, minimizes the cost, and weight of the converter system. The principle of operation, mathematical formulation, and control implementation of the proposed topology has been presented in this article. A relative comparison with existing unidirectional topologies has also been addressed. Moreover, the validated experimental results of the proposed topology have been presented along with the prototype hardware setup. [ABSTRACT FROM AUTHOR]

Space vector modulation (SVM) is a widely used method for multilevel inverters. Most of the SVM methods are nearest three vector (N3V) based schemes. Therefore, several researchers have proposed advanced implementation algorithms with reduced complexity for N3V methods. However, topologies like neutral point (NP) clamped inverter (NPCI) require some distinctive methods (called as non-N3V methods) to balance NP voltage for high modulation index and low power factor operations. Currently, the existing non-N3V methods exercise highly complex algorithms for duty ratio calculation and subtriangle identification. This paper presents a new approach, suitable for both N3V and non-N3V methods, with reduced implementation complexity. The proposed algorithm is based on an equivalent two-level space vector diagram and does not require any trigonometry, coordinate transformation, or volt-second balance solution. Unlike other carrier-based methods, it can change the switching sequence as well as the duration of redundant vectors. Moreover, the proposed approach does not require extra steps for implementing hybrid modulation and it can also be extended to multilevel topologies. One N3V, two non-N3V, and hybrid methods are developed using the proposed modulation algorithm, and are compared in detail. Simulation and experimentation on a three-level NPCI verify the validity of the proposed algorithm. [ABSTRACT FROM PUBLISHER]

This paper proposes a mathematical model for three-phase multilevel diode clamped ac/dc converter (DCC) in abc-reference frame, in order to study dynamic responses and stability of the system, where multilevel converters are employed. An attempt is made to model the converter adopting 5-level DCC and can be easily extended to DCC with any number of levels. The converter output and dc capacitor voltages are expressed in terms of input source currents and switching functions; which are basic inputs provided to a converter. Connection and capacitor currents of the converter have been analyzed. The effectiveness of the proposed mathematical model is verified by the computer simulations and experimental results. The obtained mathematical model has been validated with the physical converter model in MATLAB/Simulink environment and the prototype model using dSPACE DS under closed loop control system. The developed mathematical model equations are able to represent the physical converter with similar characteristics. [ABSTRACT FROM AUTHOR]

In this study, an artificial neural-network (ANN)-based space-vector pulse-width modulation (SVPWM) for capacitor voltage balancing of a three-phase three-level neutral-point clamped converter with improved power quality is presented. The neural-network-based controller offers the advantage of very fast implementation of the SVPWM algorithm. This makes it possible to use an application specific integrated circuit chip in place of a digital signal processor. The proposed scheme employs single layer feed-forward neural-networks at different stages along with a control algorithm using modified reference vector for capacitor voltage balancing of an improved power quality three-phase neutral-point clamped converter. In other words, the neural-network receives three-phase voltages and currents as input and generates symmetrical pulse-width modulation waves for three phases of the converter. A simulated digital signal processor (DSP)-based modulator generates the data which are used to train the network by a back-propagation algorithm in the MATLAB Neural Network Toolbox. The simulation of converter with ANN-based space-vector modulator shows excellent performance when compared with that of conventional DSP-based modulator. [ABSTRACT FROM AUTHOR]

Level-shifted pulse-width modulation (LSPWM) technique for single-star bridge cells (SSBCs)-based modular multilevel cascade inverter (MMCI) produces better harmonic performance than the phase-shifted PWM (PSPWM) technique but its applications are limited because of the unequal device conduction periods, which is undesired in high-power applications. To evenly distribute the switching and conduction losses, the switching patterns should be rotated among the H-bridge cells. This study evaluates two possible carrier rotation techniques, which combines the advantages of uniform power distribution among H-bridge cells and equal device conduction periods from PSPWM technique and improved harmonic performance from LSPWM technique. The effectiveness of the two adopted techniques has been established through simulation and experimental studies. To verify the equality in devices conduction periods, algorithms have been proposed. Further, the behaviours of the DC capacitor voltages of individual H-bridges cells of a five-level SSBC-MMCI-based active power filter have been studied with the adopted carrier rotation techniques. [ABSTRACT FROM AUTHOR]

This paper presents the design and implementation of a simple neutral point potential (NPP) regulator for a three-level diode-clamped inverter employing a sine-triangle regulator in conjunction with a closed-loop controller with reduced switching losses. The regulator principle is based on adding a continuous variable offset voltage which regulates the midpoint potential of the dc bus. The novelty of the proposed NPP regulator is in the determination of the magnitude of variable offset voltage based upon the average value, peak-to-peak amplitude, total harmonic distortions, and third harmonic content in NPP. Aside from maintaining dc-bus voltage balance, the proposed regulator leads to a significant reduction in the voltage distortion at the NP, resulting in the reduction of the required dc-bus capacitance. It also reduces the switching losses of the inverter by inserting the “no-switching” zone within each half cycle of the fundamental voltage wave. Analytical, computer simulation, and experimental results verifying the approach are presented in this paper for various load power factor angles. [ABSTRACT FROM AUTHOR]

In this study, a modulation strategy is presented using minimum number of switching transitions of optimised switching sequences for balancing of DC-bus capacitor voltages of a three-phase neutral-point clamped bi-directional converter. This new approach is derived from the fact that in front end AC-DC converters, the location of supply voltage vector and reference current vector (magnitude and lag angle) vary depending upon the amount of reactive power compensation and the load current to be supplied by converter. Accordingly, the effect of small and medium vectors (using space vector pulse-width modulation) for same switching state varies in each sector and its regions resulting in DC-bus capacitor voltage unbalancing. This observation along with the detailed analysis of current pattern for both the capacitors within each sector and its regions and its effect on neutral-point voltage deviation forms the basis of proposed approach of maintaining optimised space vector sequences and changing the number of sampling periods within each sector and its regions, thus resulting in DC-bus capacitor voltage balancing. As a result, modified reference current vector spends different amount of time in alternate sectors (moves faster and slower in alternate sectors) but total time for one complete cycle is same as actual current vector. The converter exhibits excellent performance in terms of other critical parameters like unity input power factor, low input current THD, minimum switching losses, reduced ripple factor of the regulated DC output voltage and particularly, the neutral-point voltage deviation under dynamic load conditions both for rectification and inversion modes of operation. [ABSTRACT FROM AUTHOR]

This paper presents a capacitor voltage balancing topology using a three-level boost converter (TLBC) for a neutral point clamped (NPC) three-level inverter fed surface permanent magnet synchronous motor drive (SPMSM). It enhanced the performance of the drive in terms of its voltage THD and torque pulsation. The main attracting feature of the proposed control is the boosting of the input voltage and at the same time the balancing of the capacitor voltages. This control also reduces the computational complexity. For the purpose of close loop vector control, a software based cost effective resolver to digital converter RDC-less estimation is implemented to calculate the speed and position. The proposed drive is simulated in the MATLAB/SIMULINK environment and an experimental investigation using dSPACE DS1104 validates the proposed drive system at different operating condition. [ABSTRACT FROM AUTHOR]