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Power-electronics-based hybrid dc power systems (HDCPSs) are increasingly used in many industrial applications such as land, sea, and air vehicles. In these systems, small dc-link and LC filter capacitors are of great interest for weight saving. Usually, in HDCPSs, there are constant power loads and negative dynamic impedance of these loads may generate unstable oscillations. Besides, the risk of resonance may be increased under unbalanced load conditions. In this paper, a distributed active oscillation suppression approach is presented. It is based on the analytical study of the linearized model of the studied system around the operating point. The studied system consists of one main dc source and one storage element supplying two loads: a permanent magnet synchronous motor connected to the dc link by a voltage source inverter and a resistive load supplied by a dc/dc converter through the same dc bus. The proposed approach is particularly used to overcome the resonance under unbalanced load conditions and allows reducing dc link and LC filter capacitors for weight saving. Simulations and experimentations are carried out which confirm the validity of the proposed approach. [ABSTRACT FROM AUTHOR]

In this paper, we analyze the effect of an enhanced voltage flip technique on the power performance of a piezoelectric energy harvester. The enhanced voltage flip principle is based on a synchronized-switch-based architecture, and is referred to as FAR (Full Active Rectifier). It uses a tiny amount of the stored charge to boost the voltage flip. This work aims to demonstrate that, beside the enhanced flip efficiency, the FAR also contributes to improve the power efficiency of the harvester, especially under changing load constraint. Therefore, the paper proposes a thorough comparison between the FAR and its conventional counterpart, the Switch-only technique. The FAR is easy to implement and does not require any external inductor or capacitor. It only needs a reduced set of switches, an active diode and a simple control sequence, and can thus be implemented on a fully integrated circuit. The FAR can be used as a standalone voltage flip solution or in addition to further boost the flip efficiency in a state-of-the-art architecture such as SSHC for example. Tests were performed on a 0.35-µm process CMOS prototype IC. Experimental results revealed that the FAR extracts 19.1 μ W from an off-the-shelf piezoelectric transducer when the output voltage is regulated at 1 V with 1 V open-circuit voltage and delivers up to 20% more power than the conventional Switch-only technique under load constraint. It also shows over 11 × power efficiency improvement compared to a conventional diode-based full bridge rectifier. [ABSTRACT FROM AUTHOR]