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Wireless control of modular multilevel converter (MMC) submodules can benefit from different points of view, such as lower converter cost and shorter installation time. In return for the advantages, the stochastic performance of wireless communication networks necessitates an advanced converter control system immune to the losses and delays of the wirelessly transmitted data. This article proposes an advancement to the distributed control of MMCs to be utilized in wireless submodule control. Using the proposed method, the operation of the MMC continues smoothly and uninterruptedly during wireless communication errors. The previously proposed submodule wireless control concept relies on implementing the modulation and individual submodule-capacitor-voltage control in the submodules using the insertion indices transmitted from a central controller. This article takes the concept as a basis and introduces to synthesize the indices autonomously in the submodules during the communication errors. This new approach allows the MMC continue its operation when one, some, or all submodules suffer from communication errors for a limited time. The proposal is validated experimentally on a laboratory-scale MMC. [ABSTRACT FROM AUTHOR]

Phase-modular buck–boost dc/ac inverters extend the voltage conversion range of conventional buck-type inverter topologies, and accordingly offer significant advantages for variable-speed motor drives powered from dc sources with wide-voltage-ranges like fuel cells or batteries. In this letter, two new modulation schemes are applied to the six-switch buck–boost Y-inverter (6YI) topology, with an analysis of the efficiency improvement for the proposed third harmonic injection pulsewidth modulation (TPWM) and discontinuous PWM (DPWM) schemes relative to conventional sinusoidal PWM (SPWM). Third harmonic injection PWM (TPWM) substantially reduces conduction losses and discontinuous PWM (DPWM) extends this gain by eliminating high-frequency switching for one-third of the fundamental period. These gains are validated on a 1 kW hardware demonstrator across a dc input voltage from 80 to 240 V, with DPWM reducing total converter losses by 31% over SPWM for a peak efficiency at nominal load of 95.6% with a power density of $62.3\ {\rm W/in^3}$. [ABSTRACT FROM AUTHOR]

This article presents an online health monitoring scheme for dc capacitors in modular multilevel converters (MMCs). The health monitoring algorithm is based on detecting changes in the dc capacitance value over time. The proposed algorithm only utilizes measurements that are typically available in flexible alternating current transmission systems and high-voltage direct current applications. Hence, in the proposed estimation method, no additional sensors are used. The estimation scheme considers the presence of noise in voltage and current measurements, and utilizes a recursive least square estimator in conjunction with a special low-pass filter to minimize the estimation errors. Simulation results of a hardware replica, as well as experimental results on a low-power MMC prototype show that the proposed scheme can identify the dc-link capacitance value with a maximum error of 1%. [ABSTRACT FROM AUTHOR]

Future meshed high-voltage direct current grids require modular multilevel converters with extended functionality. One of the most interesting new submodule topologies is the semi-full-bridge because it enables efficient handling of dc-side short circuits while having reduced power losses compared to an implementation with full-bridge submodules. However, the semi-full-bridge submodule requires the parallel connection of capacitors during normal operation, which can cause a high redistribution current in case the voltages of the two submodule capacitors are not equal. The maximum voltage difference and resulting redistribution current have been studied analytically by means of simulations and in a full-scale standalone submodule laboratory setup. The most critical parameter is the capacitance mismatch between the two capacitors. The experimental results from the full-scale prototype show that the redistribution current peaks at 500 A if the voltage difference is 10 V before paralleling and increases to 2500 A if the difference is 40 V. However, neglecting very unlikely cases, the maximum voltage difference predicted by simulations is not higher than 20–30 V for the considered case. Among other measures, a balancing controller is proposed, which reduces the voltage difference safely if a certain maximum value is surpassed. The operating principle of the controller is described in detail and verified experimentally on a down-scaled submodule within a modular multilevel converter prototype. It can be concluded that excessively high redistribution currents can be prevented. Consequently, they are no obstacle for using the semi-full-bridge submodule in future HVdc converters. [ABSTRACT FROM AUTHOR]

The stacked polyphase bridges (SPB) converter consists of several submodules that all are connected in series to a voltage source. The total dc-link voltage should split in a balanced way among the submodules. This does not always occur inherently. This paper presents an analysis of the capacitor voltage stability for the SPB converter. From the analysis, criteria for stability are derived and three alternatives of a suitable balancing controller are designed. The proposed controller alternatives and their associated stability properties are verified on an experimental setup and by simulation. [ABSTRACT FROM PUBLISHER]

The feasibility of future multiterminal dc (MTDC) systems depends largely on the capability to withstand dc-side faults. Simulation models of MTDC systems play a very important role in investigating these faults. For such studies, the test system needs to be accurate and computationally efficient. This paper proposes a detailed equivalent model of the modular multilevel converter (MMC), which is used to develop the MTDC test system. The proposed model is capable of representing the blocked-mode operation of the MMC, and can be used to study the balancing control of the capacitor voltages. In addition, the operation of the MMC when redundant submodules are included in the arms can also be studied. A simplified model of a hybrid high-voltage dc breaker is also developed. Hence, the developed test system is capable of accurately describing the behavior of the MMC-based MTDC system employing hybrid HVDC breakers, during fault conditions. Using time-domain simulations, permanent dc-side faults are studied in the MTDC system. In addition, a scheme to control the fault current through the MMC using thyristors on the ac side of the converter is proposed. [ABSTRACT FROM AUTHOR]

In modular multilevel converters, there is a tradeoff between the switching frequency and the voltage ripple in the submodule capacitors. The reason for this is that it becomes increasingly difficult to balance the capacitor voltages when the switching frequency is reduced. This paper presents a new submodule circuit, which improves the balancing of the capacitor voltages at low switching frequencies. The proposed submodule circuit consists of two capacitors and eight switches, forming a three-level submodule. Ideally, the voltage and current ratings of the switches can be chosen such that the combined power rating of the semiconductors is the same as for the equivalent solution with conventional halfbridge submodules. The proposed submodule circuit provides the possibility of connecting the two capacitors in parallel when the intermediate voltage level is used. This will reduce the capacitor voltage ripple, especially at low switching frequencies, and thus, allow for a reduction of the size, weight, and cost of the submodule capacitors. The proposed submodule circuit is validated by both simulations and experimental results. It is found that the parallel connection of the submodule capacitors will, in fact, significantly improve the balancing of the capacitor voltages. [ABSTRACT FROM AUTHOR]

Many publications have been presented on the modulation and control of the modular multilevel converter, some of which are based on phase-shifted carrier modulation. This paper presents an analysis of how the switching frequency affects the capacitor voltages, circulating currents, and alternating voltages using phase-shifted carrier modulation. It is found that switching frequencies that are integer multiples of the fundamental frequency should be avoided as they can cause the capacitor voltages to diverge. Suitable switching frequencies are derived for which the arm and line quantities will be periodic with symmetric operating conditions in the upper and lower arms. Thus, the practical outcome of this paper is a detailed description of how the switching frequency should be chosen in order to achieve advantageous operating conditions. The theoretical results from the analysis are validated by both simulations and experimental results. [ABSTRACT FROM AUTHOR]

Variable-speed drives have reduced voltage requirements when operating below the base speed. In a modular-multilevel-converter-based (M2C-based) motor drive, it is then possible to operate with reduced voltage in the submodule capacitors, than at the base speed. In this sense, a greater capacitor-voltage ripple can be accommodated, without exceeding the maximum peak-capacitor voltage. This paper presents an analytical investigation for the optimal selection of the average capacitor voltage for M2Cs, when the motor is operating with rated torque, below the base speed. This method does not require any power exchange between the converter arms, so it keeps the conduction losses at the minimum level. Additionally, the method decreases the switching losses, due to the decreased capacitor-voltage level. The overall ratings of the converter remain the same as in the base-speed operation. It is shown that this method can be applied at a speed range between the base speed and down to approximately one third of it, i.e., an operating range that covers the requirements for typical pump- and fan-type applications. The results obtained from the analytical investigation are experimentally verified on a down-scaled laboratory prototype M2C. [ABSTRACT FROM AUTHOR]

The balancing of the capacitor voltages in modular multilevel converters becomes increasingly difficult when the switching frequency is reduced. Typically, a reduced switching frequency will increase the spread in the capacitor voltages and, thus, the voltage ripple in the individual submodules. This paper presents a capacitor voltage balancing strategy which aims to combine a low switching frequency with a low capacitor-voltage ripple. This is done by a predictive algorithm that controls the converter in such a way that the stored charge in the submodule capacitors is evenly distributed among all the submodules when the capacitor voltages reach their maximum values. In this way, it is possible to limit the peak voltages in the submodule capacitors at switching frequencies as low as 2-3 times the fundamental switching frequency. The proposed capacitor voltage balancing strategy is validated by both simulations and experimental results with 130-Hz and 140-Hz switching frequency. In the simulations, the capacitor voltage ripple was reduced by 24% compared to the case when a conventional sorting algorithm is used, and the experimental results show that it is possible to combine the proposed voltage balancing strategy with a circulating-current controller. [ABSTRACT FROM AUTHOR]

Modular multilevel converters (M2Cs) are increasingly used in high-voltage direct current (HVDC) systems. The efficiency of M2Cs is influenced by the modulation and cell selecting methods, which determines the switching frequency and capacitor voltage ripple in the converter station. A new approach to modulation of the M2C is presented in this paper. Tolerance band methods are employed to obtain the switching instants, and also cell selection. The proposed methods overcome the modulation problem for converters with few cells on one hand and also reduce the sorting efforts for cell balancing purposes of many cells converter on the other hand. Three different algorithms are also proposed to balance the cell capacitor voltages. The evaluation is done in time-domain simulation by which the performance of each method is studied in both the steady-state and transient cases. It is observed that using tolerance band methods not only reduces the switching frequency but also allows for handling severe fault cases in a grid-connected system. Eventually, the most promising tolerance band method has been implemented and verified in a real-time digital simulator, RTDS®. The average switching frequency of 70 Hz has been achieved for the system under study, while the capacitor voltage ripple is limited to 10% of the nominal cell voltage. [ABSTRACT FROM AUTHOR]

A circuit solution to the normally-ON property of the normally-ON silicon carbide junction field-effect transistor, namely the self-powered gate driver, has been recently proposed. This letter sheds some light on the design process of the self-powered gate driver concept as well as limitations from the system perspective. It is experimentally shown that the parameters of the self-powered gate driver must be chosen taking into account a tradeoff between a fast response and stable operation of the driver. Moreover, the influence of the shoot-through current in the fast activation of the self-powered gate driver is also presented. [ABSTRACT FROM AUTHOR]

Modular multilevel converters are shown to have a great potential in the area of medium-voltage drives. Low-distortion output quantities combined with low average switching frequencies for the semiconductor devices create an ideal combination for very high-efficiency drives. However, the large number of devices and capacitors that have to conduct the fundamental-frequency current require more complex converter control techniques than its two-level counterpart. Special care needs to be taken for starting and operation at low speeds, where the low-frequency current may cause significant unbalance between the submodule capacitor voltages and disturb the output waveforms. In this paper, principles for converter operation with high torque in the whole speed range are investigated. Experimental results from a down-scaled 12-kVA prototype converter running a loaded motor at various speeds between standstill and the rated speed are also provided. [ABSTRACT FROM PUBLISHER]

In this study, a new printed circuit board (PCB) implementation of the diagonal connection is proposed. The two capacitors that are connected diagonally are laid out as close as possible and in such a way that their currents have opposite directions. The new layout combines the benefits of the so-called 'cancellation turn' with the benefits of the diagonal connection, without the need for additional PCB space and components. The experimental results show that the self-resonant frequency of the diagonally connected capacitors increased by 32%. Additionally, the coupling between the diagonally connected capacitors and a capacitor on the other side of the filter was reduced by 20-25 dB. [ABSTRACT FROM AUTHOR]

Modular multilevel converters require that the controller is designed so that the submodule capacitor voltages are equalized and stable, independent of the loading conditions. Assuming that the individual capacitor-voltage sharing is managed effectively, an open-loop strategy has been designed to ensure that the total amount of energy stored inside the converter always will be controlled. This strategy, using the steady-state solutions of the dynamic equations for controlling the total stored energy in each converter arm, has proven to be effective. The intention of this paper is to explain in a rigorous way the mechanism behind the suggested strategy and to prove that, when this open-loop strategy is used, the system becomes globally asymptotically stable. Experimental verification on a three-phase 10-kVA prototype is presented. [ABSTRACT FROM AUTHOR]

The modular multilevel converter is a promising topology for high-voltage and high-power applications. By using submodules equipped with dc-capacitors excellent output voltage waveforms can be obtained at low switching frequencies. The rated energy storage of the submodule capacitors is a driving factor of the size, cost, and weight of the submodules. Although the modular multilevel converter has been thoroughly investigated in the literature, a more detailed analysis of the energy-storage requirements will provide an important contribution for dimensioning and analysis of modular multilevel converters. Such an analysis is presented in this paper. The analysis relates the power transfer capability to the stored energy in the converter and the findings are validated by both simulations and experimental results. The required size of the submodule capacitors in a 4.5 MW grid-connected converter is first calculated and the calculated operating range is then compared with simulation results. The experimental results show that if the average capacitor voltage is allowed to increase 10% above the nominal value an energy storage to power transfer ratio of 21 J/kW can be achieved. It is concluded that the presented theory can relate the power transfer capability to the energy storage in the converter and is thus a valuable tool in the design and analysis of modular multilevel converters. [ABSTRACT FROM AUTHOR]

Theory for the dynamics of modular multilevel converters is developed in this paper. It is shown that the sum capacitor voltage in each arm often can be considered instead of the individual capacitor voltages, thereby significantly reducing the complexity of the system model. Two selections of the so-called insertion indices, which both compensate for the sum-capacitor-voltage ripples, are considered. The dynamic systems which respectively result from these selections are analyzed. An effective dc-bus model, which takes into account the contribution from the submodule capacitors, is obtained. Finally, explicit formulas for the stationary sum-capacitor-voltage ripples are derived. [ABSTRACT FROM PUBLISHER]

This paper presents a new modulation method for the modular multilevel converter. The proposed method is based on a fixed pulse pattern where harmonic elimination methods can be applied. In the proposed modulation method, the pulse pattern is chosen in such a way that the stored energy in each submodule remains stable. It is shown that this can be done at the fundamental switching frequency without measuring the capacitor voltages or using any other form of feedback control. Such a modulation scheme has not been presented before. The theoretical results are verified by both simulations and experimental results. The simulation results show successful operation at the fundamental switching frequency with a larger number of submodules. When a smaller number of submodules are used, harmonic elimination methods may be applied. This is verified experimentally on a converter with eight submodules per phase leg. The experimental results verify that stable operation can be maintained at the fundamental switching frequency while successfully eliminating the fifth harmonic in the ac-side voltage. [ABSTRACT FROM AUTHOR]

The internal control of a modular multilevel converter aims to equalize and stabilize the submodule capacitor voltages independent of the loading conditions. It has been shown that a submodule selection mechanism, included in the modulator, can provide voltage sharing inside the converter arm. Several procedures for controlling the total stored energy in each converter arm exist. A new approach is described in this paper. It is based on estimation of the stored energy in the arms by combining the converter electromotive force reference, the measured alternating output current, and the known direct voltage. No feedback controllers are used. Experimental verification on a three-phase 10 kVA prototype is presented along with the description of the new procedure. [ABSTRACT FROM AUTHOR]

Voltage-source converters (VSC) have been widely utilized to provide instantaneous reactive power support to power systems, an application referred to as static synchronous compensator (StatCom). The integration of energy storage (ES) into a StatCom makes it possible for the StatCom to provide a certain amount of active power as well as reactive power support. The possible benefit of the additional active power of a StatCom can be power oscillation damping capability, mitigation of phase-jump-related disturbances, etc. Direct connection of an ES device to the dc link of the VSC incurs an unnecessarily high-voltage rating of the VSC due to the considerable voltage swing associated with the ES device. Dual thyristor converter topology has been proposed as the interface between the ES and the dc link of the VSC. In this paper, a cost estimation for systems with the proposed interface topology is presented regarding three types of ES: capacitors, supercapacitors, and batteries. The study shows potential cost savings with utilization of the proposed interface topology. In addition, a cost comparison between different types of ES is presented, providing a guideline for the choice of ES in these kinds of applications. [ABSTRACT FROM AUTHOR]