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A switching-state selection scheme for a five-level stacked multilevel inverter for open-end winding motor drive is presented in this article. Using the proposed scheme, converter can be operated with a single dc supply and with zero common-mode voltage. In addition, the switching transition of high-voltage switches occurs at zero-voltage conditions. The degree of freedom provided by the redundant switching-states and voltage vectors of the inverter topology is utilized to design the modulation scheme. The proposed switching-state selection leads to inherent capacitor balancing without using any extra sensors and fundamental frequency switching of the high-voltage switches of the topology. The modulation scheme uses triangular carrier comparison and, hence, avoids the complexity of subsector identification and dwell time calculation. Half-wave symmetry in output waveforms is ensured by maintaining synchronous sampling with constant samples per fundamental cycle. The inverter topology and the effectiveness of the state selection scheme are experimentally validated on an open-end winding induction motor drive, and experimental results showing steady-state and dynamic operations are presented. [ABSTRACT FROM AUTHOR]

In this paper, a new inverter topology is proposed for generating a multilevel dodecagonal voltage space vector structure for open-end winding induction motor (IM) using a single dc source. Dodecagonal voltage space vector structure eliminates fifth- and seventh-order harmonic voltages from phase voltage output and hence eliminates the fifth- and seventh-order harmonic currents through the motor leading to removal of the dominant sixth-order torque ripple generation in the motor over the entire modulation range. Multilevel space vector structure generates output voltage with better THD and low dv/dt. In the proposed topology, two three-level inverters drive an open-end winding IM, one inverter from each side. DC-link of primary inverter is from a dc source which delivers the entire active power, whereas the secondary inverter dc-link is maintained by a capacitor, which is self balanced during the inverter operation. The PWM scheme implemented ensures low switching frequency for primary inverter. Secondary inverter operates at a small dc-link voltage. Hence, switching losses are small for both primary and secondary inverters. Experimental results show the elimination of fifth- and seventh-order harmonic voltages over the entire modulation range, validating effectiveness of the proposed multilevel inverter scheme. [ABSTRACT FROM PUBLISHER]