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The modular multilevel converter (MMC), owing to the presence of a large number of submodules (SMs) and energy storing elements, requires a large footprint and initial investment. To address these issues, this paper proposes the switched modular multilevel converter (SMMC). It consists of two major elements; the chain-links (CLs), consisting of cascade connection of SMs as in MMC, and the single-pole-triple-throw (SPTT) switches, which can be realized using either the T-type or NPC-type switch strings. The SMMC works on the principle of connecting all the phase-legs in series and their respective positions are mutually interchanged. It offers a compact structure as the SMs count is reduced to 33% of MMC, which results in a much lower energy storage requirement. Furthermore, it does not have inter-phase circulating current problem and hence the CL inductors can also be avoided. The SMMC structure, operating principles, control, and modulation schemes are explained in detail. A detailed comparison of SMMC with the other major existing converters is carried out to highlight the important features of SMMC. The efficacy of SMMC is validated using PSCAD simulation studies with a 19-level grid-connected SMMC model. A 3-phase 19-level SMMC laboratory prototype is developed to further validate its feasibility. [ABSTRACT FROM AUTHOR]

The parallel-hybrid converter (PHC) based high-voltage dc (HVdc) plant (PHC-HVdc) mandates the injection of additional harmonic-voltage components into its chain-links (CLs) to regulate its output voltage/modulation index (MI). However, these harmonic voltages are restricted to have limited magnitude and their zero crossings must coincide with the respective output voltages of converter. Hence, the operating range of MI for the PHC-HVdc has narrow limits. This article explores the reactive power compensating capabilities of the PHC based static compensator (PHC-STATCOM), which is relieved from the fixed dc source and is free to operate at any MI without requiring any additional efforts. Two degrees of freedom inherent with PHC-STATCOM are discovered, which proves that PHC is utilized to its maximum when applied for reactive compensation. The capacitor voltages of the PHC-STATCOM belonging to different CLs divert from desired value under unbalanced grid/load conditions. By the virtue of degrees of freedom associated with PHC-STATCOM, a capacitor voltage control technique is proposed using fundamental-frequency zero-sequence voltage (FFZSV). The generalized expression of the reference FFZSV is derived, which regulates the capacitor voltages. The loci planes indicating the maximum range of load unbalance that the PHC-STATCOM can compensate with specific grid voltage conditions is obtained and plotted. The working principles and proposed capacitor control are verified using experimental studies. A detailed comparative study is presented to substantiate the advantages of the proposed topology. [ABSTRACT FROM AUTHOR]

A two-stage hybrid isolated dc–dc boost converter for high power and wide input voltage range applications is proposed. It can be used as a front-end dc–dc converter that can boost variable low voltage from a power source [battery (home/industrial inverter/industrial UPS application), fuel-cell or solar-PV] and interface it to a high-voltage dc-ink, which typically feeds an inverter. A detailed comparison among the different family of converter topologies for isolated dc–dc boost application is carried out that can prove to be useful for power electronics engineers to choose the correct topology for a given input voltage range. The quantitative comparison takes into account the power device utilization, transformer utilization, capacitance utilization, and inductive energy requirement. Based on the comparison, it is shown that with input voltage variation greater than ±20%, two-stage hybrid isolated dc–dc boost converter is superior compared to other family of converters. Design details for the two-stage converter are provided. The converter is developed and tested for a 5 KW inverter application with an input dc voltage range of 90–170 V and output ac voltage of 230 V. Theoretical analysis for loss calculations is also provided which closely matches the experimental results. [ABSTRACT FROM AUTHOR]

The circulating current and the large energy storage requirement are the two major limitations of the modular multilevel converter (MMC). The circulating current in MMC is majorly, in addition to the dc, second harmonic in nature. If not controlled properly, it results in reduced efficiency and/or increased energy storage requirement (ESR). To enhance the efficiency, the second and the higher order harmonic components in the circulating current of MMC are required to be suppressed. On the other hand, controlling the circulating current to have predefined magnitude and phase angle can reduce the ESR. There are many control methods available in the literature to suppress and, also, to control the second harmonic circulating current (SHCC). These methods are mainly based on sensing the arm current and calculating the SHCC and then suppressing or controlling it based on the set objectives. In this article, two control schemes are proposed to suppress the SHCC and to reduce the ESR. The proposed schemes are based on utilizing the instantaneous voltage signals of the submodule capacitors in MMC. Hence, the sensing and communicating the sensed signal of arm currents can be avoided using the proposed schemes, which increases the reliability and leads to reduced cost and complexity. The efficacy of the proposed control schemes is verified using the simulation studies and also by using the scaled-down lab prototype of a three-phase seven-level MMC. [ABSTRACT FROM AUTHOR]

A current-fed dual-inductor resonant full-bridge dc–dc isolated boost converter is proposed. The converter is most suitable for applications that demand wide input voltage and load ranges. It can be used as a front-end dc–dc converter that can boost variable low voltage from a power source [battery (home/industrial inverter/industrial UPS application), fuel-cell, or solar-PV] and interface it to a high-voltage dc-link, which typically feeds an inverter. It removes all major drawbacks of conventional current-fed isolated dc–dc converters, namely high-voltage spikes across the switches due to transformer leakage inductance, need for additional start-up circuit, and difficulty in converter tripping in case of faults. Soft-switching of rectifier didoes and clamping power switches is load independent leading to good efficiency over entire load range. Converter can be operated with D < 0.5, making it suitable for wide input voltage range applications. A detailed comparative analysis with state-of-the-art converters for wide input voltage range applications considering the major important factors, such as power device utilization, transformer utilization, inductive energy requirement, and dc capacitors utilization, confirms the superiority of the proposed converter. Experimental results for a 2.5 kVA inverter application with an input dc voltage range of 90–160 V and output ac voltage of 230 V are provided. [ABSTRACT FROM AUTHOR]

Recently, the idea of combining both thyristors and IGBTs in a voltage-source converter (VSC) structure has gained significant research interests for HVDC applications. The main objectives of deriving these topologies are to achieve forced-commutation of thyristors, increased efficiency, reduced energy-storage requirement and dc-fault tolerance besides retaining the VSC control flexibility. A novel topology named ‘thyristor-augmented modular bridge converter’ (TAMBC) is proposed in this paper. Each TAMBC phase contains four chain-links comprising of series-connected stacks. Each stack contains a parallel connection of an IGBT-based submodule-branch and a thyrsitor-branch. A control technique is developed that allows the main current to flow primarily through the thyrsitor-branch to achieve higher efficiency. In each phase of TAMBC, two chain-links generate the required ac voltage in the first half-cycle and are bypassed through thyrsitor-branch during the next half-cycle. Consequently, it enables current distribution among the chain-links resulting in reduced capacitors size and enhanced efficiency. The ability of TAMBC-HVDC systems to function over a wide operating range, to ride-through ac faults and to provide independent active and reactive power control are verified using PSCAD. Capacitors design, loss analysis and comparative evaluations are carried out to highlight the key features of the TAMBC over the existing ones. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is the most preferred choice for high-voltage direct current (HVdc) applications. In this article, a new hybrid-legs bridge converter (HLBC) is presented as an alternative to the MMC. This converter is a hybrid of a two-level converter and an MMC. For a three-phase system, three single-phase HLBCs are connected either in series [series-connected HLBC (SHLBC)] or in parallel [parallel-connected HLBC (PHLBC)] across the dc-link. Compared to the MMC and the series-connected MMC, the SHLBC requires only one-third and half the submodules (SMs), respectively. Besides, the SHLBC eliminates the requirement of any arm inductor or dc-side filter. The structure and operating principle of the HLBC are described. Moreover, the minimum SM capacitance required to limit its voltage fluctuation is calculated. The dc fault-tolerant capability of the SHLBC and PHLBC is achieved by replacing some of the unipolar SMs with bipolar SMs. The operation, applicability for HVdc systems, ac fault ride through and dc fault-tolerant capability of the proposed converter are verified using PSCAD simulations. Furthermore, the feasibility of the proposed converter under normal and dc fault conditions is revalidated experimentally by using a three-phase grid-connected HLBC laboratory prototype. A comparative analysis is carried out to highlight the benefits of the proposed HLBC over the existing converter topologies. [ABSTRACT FROM AUTHOR]

The modular multilevel converter (MMC) is the most preferred voltage source converter high voltage direct current (VSC-HVdc) topology. However, its limitations such as, large energy storage requirements and a large number of devices and capacitors required in its chain-links (CLs), have led to the development of some hybrid multilevel converter topologies. These topologies aim to address the major technical constraints of MMC. The parallel hybrid converter (PHC) is such a hybrid topology, which has evolved as a promising alternative for high power applications because its CLs are not subjected to the fundamental component of ac current and hence the size of its submodule capacitors is substantially lower. Furthermore, for the same power rating, the device count in PHC is only a fraction of that in MMC. However, the PHC suffers from some operational constraints. The dc and ac sides of PHC are strongly coupled, which leads to a single stable operating point resulting in a fixed output voltage if a dedicated controller is not used to tackle this issue. Moreover, the PHC loses control during dc-side faults and it also necessitates a bulky dc filter inductor to filter the dc-side harmonics. Various advanced control methods and derived PHC topologies have been proposed in literature to eradicate these shortcomings of the PHC. This article presents a detailed analysis and review of these state-of-art control strategies and derived PHC topologies. The capability of the PHC and the derived topologies to ride through ac and dc faults are also discussed. This article contributes in summarizing key benefits and limitations of various existing control methods through extensive analyses, simulation, and experimental studies. [ABSTRACT FROM AUTHOR]

Hybrid multilevel converters using bidirectional thyristors and IGBTs have gained significant interest in recent times, as they possess important features of both voltage-source and line-commutated converter technologies. This article presents a classification of hybrid multilevel converters for HVdc applications. The methodologies to derive, evaluate, and select these converter topologies are proposed as well. The hybrid converters are classified from the power device to the system configuration based on the analogy of the voltage-source converter and the current-source converter. Derivation methods of hybrid cell, cluster, arm, phase, and converter, based on the topology tree presented in this article, are applied to derive both existing and new hybrid converters. Comparisons show that hybrid converters have functionality similar to either the modular multilevel converter or the line-commutated converter, depending on the ratio between thyristor and active switch IGBT counts employed. Several hybrid-station configurations are discussed in order to suggest the most suitable converter topology for each configuration. The presented analysis can provide a point of reference and a useful framework for the future developments of hybrid multilevel converters for HVdc applications. [ABSTRACT FROM AUTHOR]

The submodule capacitor voltage sensing and balancing is necessary for proper operation of modular multilevel converters (MMC). Voltage controlled oscillator is used for capacitor voltage measurement in the reported literature where voltage sensor is required to be calibrated. In this article, a voltage sensing method that does not need calibration of individual voltage sensors is used for capacitor voltage measurement. Moreover, a simplified sorting algorithm is employed for capacitor voltage balancing. A method of sorting the capacitor voltages that selects the submodules to be inserted directly based on logic equations is used as compared to the conventional methods of arranging them in ascending or descending order. This facilitates to simplifying the sorting technique and the scheme is easy to implement using any controller. Furthermore, to simplify the overall MMC control, the decentralized control arrangement is developed. Fairly good capacitor voltage balancing is obtained. The proposed balancing and sensing schemes of submodule capacitors are validated on a three-phase seven-level MMC hardware prototype with six submodules per arm. The prototype is tested for different operating conditions such as precharging, circulating current control, and grid connected operation of MMC. [ABSTRACT FROM AUTHOR]

The parallel hybrid converter (PHC) offers compact and highly efficient converter solution for high-power applications. One of the major drawbacks of PHC is the requirement of a bulky dc-side inductor to minimize the dc ripples. Modified third-harmonic injection method and zero-sequence voltage injection method can minimize these ripples. However, their complete mitigation is not possible with these existing methods. In this letter, a new control scheme is proposed, which eliminates the dc-side voltage/current ripple by injecting a suitable common-mode voltage into the chain-link of PHC. The presented method also increases the ac output voltage for a given dc-link voltage and effective utilization of the available dc voltage is achieved. Hence, an enhanced-PHC (EPHC) topology is achieved. The analyses presented are verified using PSCAD/EMTDC. A 25-level EPHC–HVdc system is also developed to substantiate the applicability of the proposed method for HVdc system. Experimental studies are performed using a three-phase 13-level laboratory prototype in order to verify the simulation outcomes and the findings acquired are observed to be in agreement with the simulation studies. [ABSTRACT FROM AUTHOR]

Modular multilevel converter is the most prominent topology for high-voltage dc (HVDC) applications. However, it requires a large number and size of its submodule (SM) capacitors, proportionally large number of semiconductor switches and has high losses. To address some of these issues, the modular directed series multilevel converter (MDSMC) is proposed in this article. It requires significantly reduced size of SM capacitors and lower number of semiconductor switches and capacitors for the same power output. It is a hybrid topology having two main circuit components, namely, the chain-links consisting of a number of series-connected SMs and the director switches realized using a number of series-connected insulated-gate bipolar transistors (IGBTs). A detailed analysis and operating principles of MDSMC are presented to highlight its important features. The control and modulation schemes of MDSMC are presented that enable this converter to be utilized most effectively. The SMs capacitor size calculation is performed and compared with the major HVDC converters to validate its lowest capacitive energy storage requirement. The performance of MDSMC is evaluated using PSCAD/EMTDC for both standalone and HVDC systems under varying system conditions. Its ability to provide wide operating range and four-quadrant operation for HVDC application are also verified. Loss computation validates the ability of MDSMC to provide higher efficiency. A detailed comparison between MDSMC and other major HVDC converters is performed on the basis of their various structural parameters. Furthermore, a three-phase 13-level MDSMC experiment prototype is developed to validate its feasibility, operating principles, and control logic. [ABSTRACT FROM AUTHOR]

An H-bridge hybrid modular converter (HBHMC) is proposed for high-voltage direct current (HVDC) applications. It uses a wave-shaping circuit consisting of series-connected full-bridge submodules (FBSMs) at the output of the main H-bridge converter. For a three-phase system, three HBHMCs are connected either in series (series-HBHMC) or in parallel (parallel-HBHMC) across the dc-link. The operating modes of HBHMC, novel modulation strategies for voltage balancing of FBSMs, and control of HBHMC-based HVDC system are presented in this paper. A detailed comparison between HBHMC and other hybrid topologies is performed on the basis of required number of switches and capacitors. The HBHMC has the features of dc fault blocking capability, lower footprint structure, and extra degree of freedom for submodules capacitor voltage balancing. The efficacy of the HBHMC-based HVDC system for three-phase balanced and unbalanced grid conditions and its fault-tolerant capability are validated using PSCAD simulation studies. Furthermore, the feasibility of the proposed converter under normal and dc fault conditions and of the proposed capacitor voltage control scheme is validated experimentally by using a three-phase grid-connected HBHMC laboratory prototype. The results demonstrate the effectiveness of the proposed HBHMC topology, control techniques, and satisfactory responses of the HBHMC-based HVDC system. [ABSTRACT FROM AUTHOR]

The hybrid modular multilevel converter with cascaded full bridges (HMMC-CFB) is a recently proposed dc fault tolerant converter topology for high-power applications. It has a director part (DP) consisting of a series of connected half-bridge submodules, and a wave-shaping part (WSP) composed of a series of connected full-bridge submodules (FBSMs). The submodules in DP avoid high voltage stresses and improve synchronization between DP and WSP by slowing down the change rate of DP output voltage. This slowdown is achieved by using a trapezoidal reference signal for DP. The WSP attenuates the voltage harmonics produced by DP. However, the energy exchanged by WSP changes with modulation index, which may cause improper voltage regulation of the submodule capacitors. This paper proposes a new control technique to regulate the energy exchanged by WSP, which uses a variable slope trapezoidal reference signal of DP. To obtain this slope, the feedforward and feedback controllers are used. The feedforward controller gives the value of slope depending on the modulation index (mv) to keep the energy exchanged by WSP nearly equal to zero, whereas the losses and nonideality of the converter are taken care of by the feedback controller. This technique guarantees proper voltage regulation of the submodule capacitors for all modulation indices. The efficacy of the proposed technique is confirmed using simulations and experimentations. This paper also presents a circulating current suppressing controller for HMMC-CFB. The proposed control schemes and dc fault tolerant capability of HMMC-CFB are tested on a grid-connected model built in PSCAD. [ABSTRACT FROM AUTHOR]

The fault-tolerant multilevel converters are gaining increased interests for high-voltage direct current (HVDC) applications due to their ability to suppress the fault current during dc-side faults. However, most of these topologies use full-bridge submodules (FBSMs) resulting in the requirement of a large number of semiconductor switches. In this paper, a new generalized cross-connected SM (GX-SM) structure is presented, which requires lesser number of switching devices and provides the same functionality as the FBSM. A comparison of the switches required in the different converter topologies using FBSMs and GX-SMs is performed. The performance evaluation of two of the dc-side fault-tolerant converter topologies, namely alternate arm modular multilevel converter (AAMMC) and hybrid cascaded modular multilevel converter (HCMC) with the GX-SM, is performed using simulation studies done in PSCAD/EMTDC. The modulation and control schemes for these GX-SMs-based converters are presented. A new mixed-SM configuration of AAMMC is proposed which utilizes an optimal combination of GX-SMs and half-bridge SMs. The study results demonstrate the effectiveness of the proposed GX-SM structure, and satisfactory responses of the GX-SMs-based AAMMC and HCMC systems controlled using the presented modulation and control strategies under various system conditions. [ABSTRACT FROM PUBLISHER]

The flying capacitor multicell inverter (FCMI) possesses natural balancing property. With the phase-shifted carrier-based scheme, natural balancing can be achieved in a straightforward manner. However, to achieve natural balancing with the harmonically optimal phase-disposition (PD) carrier-based scheme, the conventional approaches require (n − 1) × (n − 1) trapezoidal carrier signals for an n-level inverter, which is ( n − 1) × (n − 2) times more than that in the standard PD scheme. This paper proposes two improved natural balancing strategies for FCMI under PD scheme, which use the same (n − 1) carrier signals as used in the standard PD scheme. In the first scheme, the on-line detections are performed of (i) the band in which the modulation signal is located, (ii) corresponding period number of the carrier, and (iii) rising or falling half cycle of the carrier waveform to generate the switching signals based on certain rules. In the second strategy, the output voltage level selection is first processed and the switching signals are then generated according to a rule based on preferential cell selection algorithm. These methods are easy to use and can be simply implemented as compared to the other available methods. Simulation and experimental results are presented for a five-level inverter to verify these proposed schemes. [ABSTRACT FROM AUTHOR]

This paper proposes a flying-capacitor-based chopper circuit for dc capacitor voltage equalization in diode-clamped multilevel inverters. Its important features are reduced voltage stress across the chopper switches, possible reduction in the chopper switching frequency, improved reliability, and ride-through capability enhancement. This topology is analyzed using three-and four-level flying-capacitor-based chopper circuit configurations. These configurations are different in capacitor and semiconductor device count and correspondingly reduce the device voltage stresses by half and one-third, respectively. The detailed working principles and control schemes for these circuits are presented. It is shown that, by preferentially selecting the available chopper switch states, the dc-link capacitor voltages can be efficiently equalized in addition to having tightly regulated flying-capacitor voltages around their references. The various operating modes of the chopper are described along with their preferential selection logic to achieve the desired performances. The performance of the proposed chopper and corresponding control schemes are confirmed through both simulation and experimental investigations. [ABSTRACT FROM AUTHOR]

This paper examines the application of a diodeclamped multilevel inverter (DCMLI).based distribution static compensator (DSTATCOM) connected to a three-phase, four-wire (3p4w) distribution system. The DCMLI has an inherent unbalancing problem among its dc capacitor voltages. Additionally, when the load contains a dc part, the neutral point of the compensator also becomes unbalanced. In this paper, the effects of different loading conditions on the dc capacitor voltages of the inverter are studied. Two new control circuits are proposed for equalizing the capacitor voltages. Different control techniques are presented for the equalizing circuits. Equations of the proposed equalizing controllers are developed corresponding to the control of the switching devices. Comparative studies of different control techniques and the performances of the two controllers are performed. Simulation studies are performed using PSCADIEMTDC to validate the efficacy of the proposed equalizing controller circuits. [ABSTRACT FROM AUTHOR]

In this paper, load compensation using multilevel inverter-based distribution static compensator (DSTATCOM) is presented. The DSTATCOM is connected to a three-phase four-wire (3p4w) distribution system. Two different multilevel inverter topologies are used to realize the DSTATCOM. They are diode-clamped multilevel inverter (DCMLI) and flying capacitor multilevel inverter (FCMLI). A compensating technique has been derived, which uses the state feedback control to the multilevel inverters-based DSTATCOMs. A switching strategy for the multi-level inverters that ensures utilization of all output voltage states of the inverter for efficient tracking of references has been proposed. The schemes of dc-link capacitor volthge control for DCMLI and flying capacitor voltage control for FCMLI have been discussed. Comparative studies of performances of the two DSTATCOM topologies are performed. The simulation studies are performed using PSCAD/EMTDC to validate the efficacy of the proposed control scheme. [ABSTRACT FROM AUTHOR]

The flying capacitor multilevel inverter (FCMLI) is a multiple voltage level inverter topology intended for high-power and high-voltage operations at low distortion. It uses capacitors, called flying capacitors, to clamp the voltage across the power semiconductor devices. A method for controlling the FCMLI is proposed which ensures that the flying capacitor voltages remain nearly constant using the preferential charging and discharging of these capacitors. A static synchronous compensator (STATCOM) and a static synchronous series compensator (SSSC) based on five-level flying capacitor inverters are proposed. Control schemes for both the FACTS controllers are developed and verified in terms of voltage control, power flow control, and power oscillation damping when installed in a single-machine infinite bus (SMIB) system. Simulation studies are performed using PSCAD/EMTDC to validate the efficacy of the control scheme and the FCMLI-based flexible alternating current transmission system (FACTS) controllers. [ABSTRACT FROM AUTHOR]