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In the literature, previously various circuits have been presented on the design of the memcapacitor. Instead of designing a new memcapacitor, we can transform an existing memristor into a memcapacitor by utilizing a mutator circuit. In this study, firstly, a VDTA-based mutator structure was designed. Then, using an existing VDTA-memristor and a new VDTA-based mutator structure, a memcapacitor circuit is proposed. A transconductance gain (gm) is required due to the constitutive relations of memristor and memcapacitor to operate the mutator structure. In similar mutator structures, external circuit elements are used to obtain this gm value. However, contrary to counterparts, the gm value in the proposed circuit is presented in the internal structure of the VDTA circuit element. The proposed circuit is divided into two parts presumptively, where the first structure is called the mutator circuit and the second structure is the memristor circuit. These two structures fully represent the memcapacitor. There are one VDTA and one capacitor in both parts that constitute this memcapacitor circuit. The mutator structure has an internal gm value. It also consists of a single VDTA and one capacitor, and the memcapacitance value, which can be electronically controlled. The proposed mutator structure is superior to its counterparts thanks to these advantages. In addition, the memcapacitor emulator circuit was experimentally made using off-the-shelf devices. [ABSTRACT FROM AUTHOR]

In this paper, we present second generation current-controlled conveyor (CCCII)-based simple memristor circuit which exhibits a hard-switching voltage-current relationship. The proposed memristor circuit contains only single CCCII and single grounded capacitor that are attractive for the integrated circuit designers. The proposed memristor emulator has four main advantages: hard-switching behavior, not utilizing multiplier circuit, biasing current or voltage source (excluding DC current or voltage source), and being free of body effect for all transistors. Cadence Spectre Analog Environment with TSMC 0.18 μ m process parameters is used for all simulations. The memristive chip occupies only 81.85 μ m × 8 7. 7 6 μ m area. All simulation results are presented to demonstrate the performance of the proposed circuit by changing some parameters such as frequency, temperature, DC power supply voltages and process variations. Also, the robust performance of the proposed memristor is confirmed via Monte Carlo simulations. The simulation results for designed memristor are in accordance with theoretical memristive behavior. [ABSTRACT FROM AUTHOR]

The memcapacitor is one of the new memory circuit elements although it is not found on the market as a discrete circuit element. In this study, two simple memcapacitor emulators were developed using active circuit elements. These proposed circuits are both electronically controllable. The relationship between charge and flux depending on different frequencies was obtained for both presented memcapacitor circuits. To demonstrate the experimental response of the circuit, discrete circuit elements were used to build the first proposed circuit on the breadboard. All experimental results showed good agreement with the theoretical analyses. [ABSTRACT FROM AUTHOR]

This paper presents a new floating memristor emulator (FME) consisting of only a single current backward transconductance amplifier (CBTA) as the active element and two grounded capacitors. The proposed FME-based on CBTA enjoys some advantages that include minimum active and passive elements without using an analog multiplier circuit and grounded passive elements which are attractive for the integrated circuit. In addition, excluding the DC power supply voltage, it does not use bias voltage and/or bias current. The designed memristor circuit provides incremental and decremental characteristics without changing circuit topology or using a switching mechanism and it is implemented with a minimum of circuit elements. All simulation results for the memristor emulator were obtained as expected when compared with fabricated memristors. [ABSTRACT FROM AUTHOR]

In this study, a simple memristor circuit using only one Voltage Differencing Current Conveyor (VDCC), two PMOS transistors and one grounded capacitor, is designed. The presented memristor exhibits electronically controllable characteristics, which are superior to its counterparts. Both the memductance value and the operating frequency can be electronically tuned through voltage sources. The proposed memristor, which occupies 42.2 µm × 27.5 µm area excluding the area of the capacitor, is laid by using Cadence Environment using TSMC 0.18 µm process parameters. In addition, the proposed memristor is implemented by using discrete circuit elements on the breadboard and detailed analyses are given by changing the values of the discrete circuit elements. All results are compatible with the previous studies. [ABSTRACT FROM AUTHOR]

In this paper, we present a memristor emulator based on voltage difference transconductance amplifier (VDTA). The proposed memristor emulator circuit contains only one VDTA as an active element and single grounded capacitor which benefits from the integrated circuit. Furthermore, it can be utilized MOS-capacitance instead of the external capacitor in the circuit. The complete memristor emulator is laid by using Cadence Environment using TSMC $0.18\ {\boldsymbol \mu }\text{m}$ process parameters. It occupies an area of $35.7\ {\boldsymbol \mu }\text{m}\,\,\times 29\ {\boldsymbol \mu }\text{m}$. Its simulation results are given to demonstrate the performance of the presented memristor emulator in different operating frequencies, process corner, and radical temperature changes. Moreover, prototype circuit is implemented to confirm the theoretical analysis by employing the single LM13700 commercial device as an active element. Experimental results of the designed memristor emulator are given to investigate its ability for different operating frequencies, the capacitance value and resistor value and DC supply voltage. The experimental results are in accordance with theoretical analyses and simulation results. [ABSTRACT FROM AUTHOR]

In this paper, we presented Multi-Output Operational Transconductance Amplifier (MO-OTA)-based floating memristor emulator circuit. The designed memristor circuit has only one MO-OTA and one grounded capacitor which is attractive for an integrated circuit. It does not consist of any multiplication circuit block to obtain nonlinear behavior of memristor. It is difficult to obtain the hard-switching voltage–current relationship than the smooth-switching voltage–current relationship of memristor but we obtained hard-switching voltage–current characteristics using single floating memristor circuit. The complete memristor circuit is laid by using Cadence Environment using TSMC 0.18 μ m process parameters. The layout area of MO-OTA occupies an area of 34 μ m × 14 μ m. Its post-layout simulation results are given to demonstrate the performance of the presented memristor emulator in different operating frequencies, process corner and radical temperature changes. All post-layout simulations agree well with theoretical analyses. As application examples, different connections such as serial, parallel and single of memristor emulator are investigated to test its connectivity. [ABSTRACT FROM AUTHOR]

In this paper, memristor emulator circuit consisting of only seven MOS transistors and one grounded capacitor is presented. Memristors exhibit nonlinear voltage-current relationship and many previous emulator circuits have multiplier circuit to provide the nonlinear characteristic of the memristor. But there is no any multiplier circuit block in the proposed circuit so the proposed memristor circuit occupies low chip area. The memristor circuit is laid by using Cadence Environment with TSMC 0.18 µm process parameters and its layout dimensions are only 12 µm × 38 µm excluding the area of the capacitor. The post-layout simulation results for memristor are given to demonstrate the performance of the presented memristor emulator in different operating frequencies, process corner, and radical temperature changes. All post-layout simulations agree well with theoretical analyses. Besides the VLSI implementation of the memristor, the proposed circuit is built on the breadboard using discrete circuit elements. [ABSTRACT FROM AUTHOR]

In this study, two new lossless grounded inductor simulators (GISs) made up of a single plus-type second-generation current conveyor, two inverting voltage buffers and a minimum number of passive components are proposed. There is no requirement of matching conditions and cancellation constraints among passive elements of the proposed GISs. Nevertheless, both of the proposed GISs have a floating capacitor which can be easily realized in nowadays integrated circuit fabrication. A second-order voltage-mode band-pass filter application is given for the proposed lossless GISs. A number of simulations based on SPICE program are given so as to verify the theory. [ABSTRACT FROM AUTHOR]

In this work, novel first order MOS-C phase shifter structures are proposed in NMOS and PMOS configurations. Core circuits consist of only three transistors and a single capacitor. The pole frequency of the phase shifters can be easily controlled by the bias voltage. The presented circuits in this work bring advantages such as low power consumption and small chip area when compared to other works including large numbers of active and passive elements in the literature. Furthermore, the proposed circuits are designed with a simple design automation flow that is proper for MOS-Only or MOS-C architectures. It is shown by simulations that the simulation results agree with the theoretical results for a wide frequency range. [ABSTRACT FROM AUTHOR]

This paper presents second order band-pass filter with high quality factor. Its high quality factor is provided by feedback circuit. The used second order filter is modified so that filters outputs through capacitor can be obtained to high impedance output. Thereby, there is no need the extra active element to obtain filter outputs. Also, the output stage of current differencing transconductance amplifier have only X− terminals instead of X+ and X− terminals. Furthermore, the quality factor of the band-pass filter with feedback circuit is increased by feedback gain consisting of only four transistors. Besides, to examine effects of parasitic elements, non-ideal and sensitivity, the overall structure is investigated deeply. Working conditions and boundaries of the overall structure is also defined. The simulation demonstrates good agreement between the theoretical expectations and simulation results. [ABSTRACT FROM AUTHOR]