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The conventional design of voltage-source power converters is based on a two-level half-bridge configuration and the selection of power devices designed to meet the full application specifications (voltage, current, etc.). This leads to the need to design and optimize a large number of different devices and their ancillary circuitry and prevents taking advantage from scale economies. This paper proposes a paradigm shift in the design of power converters through the use of a novel configurable device consisting on a matrix arrangement of highly optimized switching cells at a single voltage class. Each switching cell consists of a controlled switch with antiparallel diode together with a self-powered gate driver. By properly interconnecting the switching cells, the switching-cell array (SCA) can be configured as a multilevel active-clamped leg with a different number of levels. Thus, the SCA presents adjustable voltage and current ratings, according to the selected configuration. For maximum compactness, the SCA can be conceived to be only configurable by the device manufacturer upon the customer needs. For minimum cost, it can also be conceived to be configurable by the customer, leading to field-configurable SCAs. Experimental results of a 6 × 3 field-configurable SCA are provided to illustrate and validate this design approach. [ABSTRACT FROM AUTHOR]

Several pulsewidth modulation (PWM) strategies have been proposed for three-phase multilevel converters. Typically, these PWM methods can be either space-vector or carrier-based implemented, where the carrier-based implementation usually presents a lower computation complexity. In this paper, a novel approach for the carrier-based implementation of different existing PWM methods is proposed for three- (3L) and four-level (4L) dc–ac converters, which can be easily extended to any number of levels. The main features of the proposed approach are its reduced computation complexity and computation time. On the other hand, the proposed approach suggests the derivation of novel PWM strategies which can potentially present improved performance features. As an example, two new discontinuous PWM (DPWM) strategies are proposed for the 4L converter. One of these DPWM strategies presents lower weighted total harmonic distortion than other previously proposed strategies. Simulation and experimental results verify the effectiveness of the proposed approach and novel DPWM strategies. [ABSTRACT FROM AUTHOR]

This paper presents a novel pulsewidth modulation (PWM) strategy for n-level three-leg semiconductor-clamped dc–ac converters in the overmodulation region, with dc-link capacitor voltage balance in every switching cycle. The strategy is based on the virtual-vector concept. Suitable reference vector trajectories are selected to obtain low weighted total harmonic distortion and a simple algorithm. A hexagonal-boundary compression factor is introduced to guarantee, at any operating point, dc-link capacitor voltage regulation capabilities in every switching cycle and avoid narrow gate pulses. The detailed PWM algorithm for an easy implementation in a digital control platform is also presented. The good performance of the strategy is verified through both simulation and experiments in a three-level three-phase neutral-point clamped converter. [ABSTRACT FROM PUBLISHER]

Voltage total harmonic distortion and quadratic voltage ripple criteria are accepted figures of merit of a multilevel pulse width modulation (PWM) converter voltage quality. The dominating frequency domain approach does not deliver simple closed-form expressions and practically requires accounting up to 40–50 switching harmonics. Assuming infinitely high switching frequency, suggested time domain approach to a multilevel multiphase PWM voltage quality evaluation provides closed-form piece-wise analytical solutions. These simple formulas clearly reveal the dependence on modulation index for arbitrary voltage level and odd phase numbers. The results are applicable to any type of multilevel converters (including interleaved, open winding and other) operated with nearest level/nearest space vector modulation and relatively high switching frequency. [ABSTRACT FROM PUBLISHER]

The increasing installed wind power capacity has caused wind power generation to become a significant percentage of the entire electric power generation. As a consequence, the power system operators have included wind power plants regulation to improve the control of the overall power system, both in steady-state and transient operation. Therefore, wind power systems are required to verify the grid connection requirements stated by the power system operators. In presence of grid voltage dips, the low voltage ride-through (LVRT) requirement compliance produces a mismatch between the generated active power and the active power delivered to the grid. The conventional solution assumes that the active power surplus is dissipated in a dc-link resistor. In this paper, a control scheme for the back-to-back neutral-point-clamped converter is proposed. Under grid voltage dip, the controllers for generator-side and grid-side converters work concurrently to meet the LVRT requirement by storing the active power surplus in the turbine-generator mechanical system inertia while keeping constant the dc-link voltage. Simulation and experimental results verify the proposed control scheme. [ABSTRACT FROM PUBLISHER]

This paper presents the definition of the virtual vectors for the general case of an n-level two-leg diode-clamped converter, suggests guidelines for designing virtual-vector pulsewidth modulation (PWM) strategies, and provides the mathematical expressions of the leg duty-ratio waveforms corresponding to this family of PWMs. Modulations defined upon these vectors guarantee the dc-link capacitor voltage balance in every switching cycle under any type of load and enable the use of these topologies with passive front ends. The performance of these multilevel converters operated with the proposed PWMs is compared to the performance of alternative designs through analysis, simulation, and experiments. [ABSTRACT FROM AUTHOR]

Low-voltage ride-through (LVRT) requirements demand wind-power plants to remain connected to the network in presence of grid-voltage dips. Most dips present positive-, negative-, and zero-sequence components. Hence, regulators based on symmetrical components are well suited to control gridconnected converters. A neutral-point-clamped topology has been considered as an active front end of a distributed power-generation system, following the trend of increasing power and voltage levels in wind-power systems. Three different current controllers based on symmetrical components and linear quadratic regulator have been considered. The performance of each controller is evaluated on LVRT requirement fulfillment, grid-current balancing, maximum grid-current value control, and oscillating power flow. Simulation and experimental results show that all three controllers meet LVRT requirements, although different system performance is found for each control approach. Therefore, controller selection depends on the system constraints and the type of preferred performance features. [ABSTRACT FROM AUTHOR]

Several pulsewidth modulation (PWM) strategies have been proposed for the three-level three-phase diode-clamped dc-ac converter. Among them, the nearest-three virtual-space-vector PWM guarantees the dc-link capacitor voltage balance under any operating condition, provided that the addition of the three phase currents equals zero. This paper extends this modulation concept to the four level converter. The new virtual vectors are presented and a simple modulation solution is defined. Conventional nearest-three space vector PWM cannot comprehensively achieve balanced and stable dc-link voltages. The proposed modulation solution enables the practical use of the four-level converter since it guarantees the dc-link capacitor voltage balance for any operating condition and load, provided that the addition of the three phase currents equals zero. Simulation and experimental results prove the goodness of the presented approach. [ABSTRACT FROM AUTHOR]

This paper presents an approach to continuous variable design optimization of a power electronics converter. The objective of the optimization approach is to minimize the total component cost. The methodology is illustrated with the design of a boost power factor correction front-end converter with an input electro- magnetic interference filter. The system design variables are first identified. The relevant system responses and component costs are then expressed as a function of these design variables. Finally, by using mathematical optimization techniques, the design variable values that minimize the total system component cost are obtained, given practical constraints on these design variables and system responses. [ABSTRACT FROM AUTHOR]

This paper proposes a hybrid converter to supply power from solar power source to load. Since power is generated by solar power, which depends on the intensity of solar power, the power generated by the solar power does not keep at a constant power. Therefore, the proposed system needs a battery to balance power between solar power and load. When the proposed one uses the battery to balance powers, the proposed circuit requires a charger and discharger. To simplify the proposed converter, a buck-boost converter and flyback converter can be combined to implement the battery charging and discharging functions. With this approach, the proposed converter can be operated with zero-voltage switching (ZVS) at turn-on transition to reduce switching loss of switch when the proposed one is operated in the discharging mode. In addition, the proposed hybrid converter has several merits, which are less component counts, lighter weight, smaller size and higher conversion efficiency. As compared with the conventional counterparts with hard-switching circuit, the proposed one can increase conversion efficiency of 4% and achieve efficiency of 85% under full load condition when the proposed one is operated in the discharging mode. Experimental results which are obtained from a prototype with output voltage of 10 V and maximum output power 20 W have been implemented to verify its feasibility. It is suitable for an electronic sign indicating LED within 200 W, which is used in the night time. [ABSTRACT FROM AUTHOR]

This paper proposes a closed-loop control implementation fully-embedded into an FPGA for a permanent-magnet synchronous motor (PMSM) drive based on a four-level active-clamped converter. The proposed FPGA controller comprises a field-oriented control to drive the PMSM, a DC-link voltage balancing closed-loop control (VBC), and a virtual-vector-based modulator for a four-level active-clamped converter. The VBC and the modulator operate in consonance to preserve the DC-link capacitor voltages balanced. The FPGA design methodology is carefully described and the main aspects to achieve an optimal FPGA implementation using low resources are discussed. Experimental results under different operating conditions are presented to demonstrate the good performance and the feasibility of the proposed controller for motor-drive applications. [ABSTRACT FROM AUTHOR]