Search

In this paper, a new basic 15-level inverter is proposed. By developing the proposed basic unit, a 71-level inverter and generally an -level inverter are proposed. Then, the proposed multilevel inverter is compared with several conventional multilevel inverters in design of minimum 15 levels and 71 levels at the output. By comparing these inverters, it is obtained that the proposed inverter is able to generate higher number of output levels by using lower number of DC voltage sources and power electronic devices that lead to decreased complexity, installation space and total cost of the inverter. Finally, the correct performance of the proposed inverter is reconfirmed through the simulation and experimental results of a 15-level inverter. [ABSTRACT FROM AUTHOR]

In this paper, a new cascaded multilevel inverter is proposed. For the proposed inverter, two different algorithms to determine the magnitude of the dc voltage sources are proposed. Then, in order to generate maximum numbers of output voltage levels by using a constant number of power switches and/or dc voltage sources, several optimum structures of the proposed inverter are obtained. In comparison with the conventional cascaded multilevel inverters, the proposed inverter is able to generate a high number of output voltage levels by using a lower number of power electronic devices such as power switches, driver circuits, power diodes, and dc voltage sources. In addition, the low amount of blocked voltage by switches is another advantage of the proposed inverter. The accuracy performance of the proposed inverter in generating the positive and negative voltage levels is verified through the experimental results on a 61-level inverter. [ABSTRACT FROM PUBLISHER]

In this paper, a new general cascaded multilevel inverter using developed H-bridges is proposed. The proposed topology requires a lesser number of dc voltage sources and power switches and consists of lower blocking voltage on switches, which results in decreased complexity and total cost of the inverter. These abilities obtained within comparing the proposed topology with the conventional topologies from aforementioned points of view. Moreover, a new algorithm to determine the magnitude of dc voltage sources is proposed. The performance and functional accuracy of the proposed topology using the new algorithm in generating all voltage levels for a 31-level inverter are confirmed by simulation and experimental results. [ABSTRACT FROM PUBLISHER]