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A metal/oxide/high-kappa dielectric/oxide/silicon (MOHOS) planar charge trapping memory capacitor including SiO2 as tunnel oxide, Al-HfO2 as charge trapping layer, SiO2 as blocking oxide and TaN metal gate was fabricated and characterized as test vehicle in the view of integration into 3D cells. The thin charge trapping layer and blocking oxide were grown by atomic layer deposition, the technique of choice for the implementation of these stacks into 3D structures. The oxide stack shows a good thermal stability for annealing temperature of 900 degrees C in N-2, as required for standard complementary metal-oxide-semiconductor processes. MOHOS capacitors can be efficiently programmed and erased under the applied voltages of +/- 20 V to +/- 12 V. When compared to a benchmark structure including thin Si3N4 as charge trapping layer, the MOHOS cell shows comparable program characteristics, with the further advantage of the equivalent oxide thickness scalability due to the high dielectric constant (kappa) value of 32, and an excellent retention even for strong testing conditions. Our results proved that high-kappa based oxide structures grown by atomic layer deposition can be of interest for the integration into three dimensionally stacked charge trapping devices.

Resistance switching random access non-volatile memories (ReRAM) could represent the leading alternative to floating gate technology for post 32 nm technology nodes. Among the currently investigated materials for ReRAM, transition metal binary oxides, such as NiO, CuxO, ZrOx, TiO2, MgO, and Nb2O5 are receiving increasing interest as they offer high potential scalability, low-energy switching, thermal stability, and easy integration in CMOS fabrication. In this work we investigate the resistive switching properties of NiO and Nb2O5 films grown by electron beam and atomic layer deposition (ALD) as a function of growth technique and electrode materials. The polycrystalline NiO and amorphous Nb2O5 films are initially in the high resistance state and exhibit reproducible unipolar switching after an appropriate forming stage. Beside noble metal electrodes, particular focus is on n(+)-Si, W, and TiN materials which are compatible with CMOS device fabrication process. (C) 2008 Elsevier B.V. All rights reserved.

The control of the self-assembly (SA) process and nanostructure orientation in diblock copolymer (DBC) thick films is a crucial technological issue. Perpendicular orientation of the nanostructures in symmetric and asymmetric poly(styrene)-b-poly(methyl methacrylate) (PS-b-PMMA) block copolymer films obtained by means of simple thermal treatments was demonstrated to occur in well-defined thickness windows featuring modest maximum values, thus resulting in low aspect ratio (h/d < 2) of the final lithographic mask. In this manuscript, the thickness window corresponding to the perpendicular orientation of the cylindrical structures in asymmetric DBC is investigated at high temperatures (190 °C

A systematic study of the deposition parameters for themetal-organic chemical vapour deposition growth of In-Sb- Te (IST), of interest for phase change memory applications, was performed. Samples were grown on Si/SiO2 and patterned substrates in the (220 divided by 350) degrees C temperature range and working pressure from 35 to 100x10(2) Pa, which resulted in the formation of thin films (down to 30 nm) or IST crystals. The chemical composition of the IST films was mainly dependent on the deposition temperature. We have demonstrated the possibility to obtain a conformal and smooth morphology with improved surface roughness for films grown at 260 degrees C when the substrate surface is treated with the TrisDimethylaMinoAntimony ([N(CH3)(2)](3)Sb) precursor. The IST-based chalcogenide films exhibited different crystalline and partially amorphous phases, which may be favourable for multilevel data storage. The IST growth mechanism was analysed in terms of the structural, compositional and electrical properties.