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We study the effect on various properties of varying the intrinsic layer (i-layer) thickness of amorphous/crystalline silicon heterojunction (SHJ) solar cells. Double-side monocrystalline silicon (c-Si) heterojunction solar cells are made using hot-wire chemical vapor deposition on high-lifetime n-type Czochralski wafers. We fabricate a series of SHJ solar cells with the amorphous silicon (a-Si:H) i-layer thickness at the front emitter varying from 3.2 nm (0.8xi) to ~ 96 nm (24xi). Our optimized i-layer thickness is about 4 nm (1xi). Our reference cell (1xi) performance has an efficiency of 17.1% with open-circuit voltage (V oc ) of 684 mV, fill factor (FF) of 76%, and short-circuit current density (J sc ) of 33.1 mA/cm 2 . With an increase of i-layer thickness, V oc changes little, whereas the FF falls significantly after 12 nm (3xi) of i-layer. Transient capacitance measurements are used to probe the effect of the potential barrier at the n-type c-Si/a-Si interface on minority-carrier collection. We show that hole transport through the i-layer is field-driven transport rather than tunneling.

Low substrate temperature (

The hot-wire chemical vapor deposition (HWCVD) technique was employed to deposit μc-Si emitters and a-SiNx:H passivation/antireflection films, and to hydrogenate silicon thin layers grown by atmospheric-pressure iodine vapor transport (APIVT). Photovoltaic devices with HWCVD μc-Si emitters on APIVT epitaxial silicon exhibit greater than 8% efficiency, similar to those made with diffused junctions. On polycrystalline APIVT-Si layers, a HWCVD-deposited μc-Si emitter reduces open-circuit voltage loss caused by grain boundaries. Hot-wire hydrogenation improves Hall mobility by approximately 50%. HWCVD a-SiNx:H films improve minority-carrier lifetime significantly after thermal annealing at temperatures up to 500 °C.

We have developed a p-type, crystalline Si-based solar cell using hot-wire chemical vapor deposition (HWCVD) n-type microcrystalline Si to form an n-p junction (emitter). The CVD process was rapid and a low substrate temperature was used. The p-type Czochralski (CZ) c-Si wafer has a thickness of 400 μm and has a thermally diffused Al back-field contact. Before forming the n-p junction, the front surface of the p-type c-Si was cleaned using a diluted HF solution to remove the native oxides. The n-type emitter was formed at 220 °C by depositing 50 A a-Si:H and then a 100 A μc-Si n-layer. The total deposition time to form the emitter was less than 1 min. The top contact of the device is a lithograph defined and isolated 1×1 cm 2 and 780 A indium tin oxides (ITO) with metal fingers on top. Our best solar cell conversion efficiency is 13.3% with V oc of 0.58 V, FF of 0.773, and J sc of 29.86 mA cm −2 under one-sun condition. Quantum efficiency (QE) measurement on this solar cell shows over 90% in the region between 540 and 780 nm, but poor response in the blue and deep red. We find that the ITO top contact that acts as an antireflection layer increases the QE in the middle region. To improve the device efficiency further, J sc needs to be increased. Better emitter and light trapping will be developed in future work. The cell shows no degradation after 1000 h of standard light soaking.

We study amorphous/crystalline silicon heterojunctions (Si HJ) in both p-type and n-type c-Si solar cells under high level of photon injection using concentrated light up to 55 suns. The performance of the cells under intensive light is similar to other types of crystalline Si solar cells. The open circuit voltage (V oc ) increases logarithmically with light intensity for both n-type and p-type base cells and best 760 mV at 48 suns. The best cell efficiency peaks around 10 suns at 19.6% on an untextured p-type Si HJ cell. It represents an 11% increase of the efficiency relative to the one at 1 sun. The decrease of cell efficiency at a higher light intensity is mainly due to the decrease of fill factor (FF). We also found that the FF decreases much quickly in the cell with an n-type wafer compared to a p-type wafer. After more experiments with controlled front finger space, wafer bulk resistivity, and the area of the cells, we conclude that there is a difference in carrier collection for the heterojunction emitters of the n-type and of the p-type c-Si solar cells under intensive illumination.

Minority carrier lifetime and Suns-V oc measurements are well-accepted methods for characterization of solar cell devices. We use these methods, with an instrument from Sinton Consulting, as we fabricate and optimize state-of-the-art all hot-wire chemical vapor deposition (HWCVD) silicon heterojunction (SHJ) devices. For double-sided SHJ devices, lifetime measurements were performed immediately after hydrogenated amorphous silicon (a-Si:H) deposition of the front emitter and back base contacts on a Silicon wafer, and also after indium tin oxide (ITO) deposition of transparent conducting oxide contacts. We report results of minority carrier lifetime measurements for double-sided p-type Si heterojunction devices and compare Suns-V oc results to Light I–V measurements on 1-cm2 solar cell devices measured on an AM1.5 calibrated XT-10 solar simulator.

We are reporting high performance silicon heterojuncton (SHJ) solar cells fabricated using the hot-wire chemical vapor deposition (HWCVD) technique. On p-type c-Si float-zone wafers, we used an amorphous n/i contact to the top surface and an i/p contact to the back surface to obtain an open circuit voltage (V oc ) of 0.67 V in a 1 cm2 cell with an independent confirmed efficiency of 18.2%. This is the best reported p-type SHJ solar cell, at least by HWCVD. On n-type c-Si float-zone wafers, we used an amorphous (p/i) front emitter and an a-Si:H (i/n) back contact to achieve a Voc of 0.69 V on 1 cm2 cell. We found that proper c-Si surface cleaning prior to the amorphous Si deposition and double-heterojunction is a key to the high Voc. In the heterojunction region, an abrupt interface from c-Si to a-Si:H results in a high Voc; while incorporating a transition to either microcrystalline or epitaxial Si at the c-Si interface results in a low V oc . Lifetime measurement shows that the back surface recombination velocity can be reduced to ~15 cm/s through a-Si:H passivation. Amorphous silicon heterojunction layers on crystalline wafers thus combine low-surface recombination velocity with excellent carrier extraction. The advantages of using HWCVD in comparing with plasma-enhanced CVD are the fast deposition rate and, more important, a wide range of deposition parameters enabling formation of an effective heterojunction with high V oc . Further, the heterojuction cell processing is entirely below 200°C making it one of the few promising low-stress methods for the manufacturing of next generation ultra-thin Si wafer solar cells.

We report progresses in the development of silicon heterojunction (SHJ) solar cells by hot-wire chemical vapor deposition (HWCVD). A confirmed 18.2% efficiency on a p-type textured wafer has been achieved based on improvements in surface passivation by a-Si:H emitter and back contact as well as in fill factor. The primary objective of high open-circuit voltage (Voc) is achieved by front a-Si:H/c-Si heterojunction optimization, by replacing a conventional Al-alloyed or P-diffused back-surface field with a back c-Si/a-Si:H heterojunction, and by maintaining excellent surface passivation on textured silicon wafers. We first obtain a Voc of 652 mV with a front a-Si:H(n/i) heterojunction emitter on p-type solar cells with an Al back-surface-field (BSF) contact. The high-temperature Al-BSF is then successfully replaced by low-temperature HWCVD-deposited a-Si:H(i/p) layers as the back contact. Lifetime measurement shows the surface recombination velocity (SRV) is reduced to ~15 cm/sec. A higher Voc of 676 mV is obtained with an a-Si:H(n/i) front-emitter and a-Si:H(i/p) back-contact double-heterojunction SHJ solar cell structure, indicating superior back-surface passivation of the textured p-wafer. On n-type silicon wafers, we use an a-Si:H(p/i) front emitter and an a-Si:H(i/n) back contact, to achieve a Voc of 711 mV, the highest voltage obtained by the HWCVD technique so far. Good fill factors are also obtained using the amorphous-phase materials as the back contacts. S-shaped I-V curves are observed if doping cross-contamination are present among different a-Si:H layers or doping level is not enough in the TCO-contacting p-type a-Si:H layer

We use a high-throughput (combinatorial) hot-wire chemical vapor deposition system to passivate the crystal silicon surface and to grow heterojunction silicon solar cells. We study the effectiveness of crystal surface treatments by atomic H or/and NH/sub x/ radicals, followed by the growth of thin hydrogenated amorphous silicon (a-Si:H) films. Treatment and layer properties such as times, thicknesses and gas mixtures can be continuously graded, creating a two-dimensional sample with each variable varying in one direction. This results in high-throughput optimization of the processes. Effective carrier lifetime is measured by photoconductive decay to evaluate the effectiveness of the surface passivation by surface treatments. The effective carrier lifetime increases from about 5 /spl mu/s without passivation to about 24 /spl mu/s with an optimized surface treatment and thickness a-Si:H on single-sided c-Si. Transmission electron microscopy reveals that a-Si:H, a mixed phase, or epitaxial growth of thin-film Si depending upon the surface treatment. Improvement in effective carrier lifetime correlates to with an immediate a-Si:H growth on c-Si, rather than a mixed phase and epitaxial Si growth. We have obtained an efficiency of 13.4% on a non-textured single-sided heterojunction solar cell on a p-type CZ-Si processed with optimized surface treatment.

Large-grained (5-20 /spl mu/m) polycrystalline silicon layers have been grown at intermediate temperatures of 750/spl deg/-950/spl deg/C directly on foreign substrates without a seeding layer by iodine vapor transport at atmospheric pressure with rates as high as 3 /spl mu/m/min. A model is constructed to explain the atypical temperature dependence of growth rate. We have also used this technique to grow high-quality epitaxial layers on heavily doped CZ-Si and on upgraded MG-Si substrates. Possible solar cell structures of thin-layer polycrystalline silicon on foreign substrates with light trapping have been examined, compared, and optimized by two-dimensional device simulations. The effects of grain boundary recombination on device performance are presented for two grain sizes of 2 and 20 /spl mu/m. We found that 10/sup 4/ cm/s recombination velocity is adequate for 20-/spl mu/m grain-sized thin silicon, whereas a very low recombination velocity of 10/sup 3/ cm/s must be accomplished in order to achieve reasonable performance for a 2-/spl mu/m grain-sized polycrystalline silicon device.

Efficient crystalline silicon heterojunction solar cells are fabricated on p-type wafers using amorphous silicon emitter and back contact layers. The independently confirmed AM1.5 conversion efficiencies are 19.3% on a float-zone wafer and 18.8% on a Czochralski wafer; conversion efficiencies show no significant light-induced degradation. The best open-circuit voltage is above 700 mV. Surface cleaning and passivation play important roles in heterojunction solar cell performance.

The atomic structure and electronic properties of crystalline-amorphous interfaces in silicon heterojunction solar cells are investigated by high-resolution transmission electron microscopy, atomic-resolution Z-contrast imaging, and electron energy-loss spectroscopy. With these combined techniques, we directly observe abrupt and flat transition from crystalline Si to hydrogenated amorphous Si at the interface of Si heterojunction solar cells. We find that high-quality hydrogenated amorphous Si layers can be grown abruptly by hot-wire chemical vapor deposition on 200°C (100) Si substrates after a two-step pretreatment of the substrate, comprised of exposure to hot-wire decomposed H2-diluted NH3 followed by atomic H etching.