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Nowadays, wafer fabrication in semiconductor manufacturing is highly dependent on cluster tools. A cluster tool is equipped with several process modules (PMs) and a wafer handling robot. When the tool is operating, generally each PM is processing a wafer, and the robot is responsible for delivering the wafers from one PM to another. Thus, when a wafer is completed in a PM, the robot may be busy for performing other tasks such that it cannot immediately unload the completed wafer in the PM, resulting in that the wafer has to stay there for some extra time. The processing time of a wafer together with its delay time for waiting for the robot’s arrival for unloading is defined as wafer residency time in a PM. However, a long wafer delay time may deteriorate its quality. Therefore, it is highly desired and important to reduce the wafer delay time at each step as much as possible. This work aims to tackle this important issue for single-arm cluster tools (SACTs). Specifically, by using a Petri net model, this work analyzes the steady-state operational behavior of an SACT under the backward and earliest starting strategies. It is found that there must exist wafer delay time at the steps in the upstream of the bottleneck step, and such wafer delay time can be reduced by properly adjusting the robot waiting time. Thus, three algorithms are developed to reduce the wafer delay time at each step as much as possible by properly assigning the robot idle time. Finally, the application of the proposed method is illustrated by using examples. Note to Practitioners—In a modern semiconductor fab, there are hundreds of cluster tools for wafer fabrication. To ensure wafer quality, it is important to reduce the wafer delay time in PMs of cluster tools after a wafer is processed since the high temperature, chemical gas, and particles in the PMs may damage the wafer. To do so, this work proposes three algorithms with polynomial complexity to assign the robot idle time as robot waiting time such that the wafer delay time in PMs can be reduced as much as possible. Furthermore, the obtained schedule by these algorithms is optimal in terms of the cycle time. Besides, the developed algorithms can be easily embedded into the controller of cluster tools by facility engineers. Therefore, this work has a practical value. [ABSTRACT FROM AUTHOR]

With the reduction of wafer batch size on account of the diversification and individuation of consumption demands, increasing importance has been attached to the schedulability and controllability of the cluster tools with multiple wafer types being concurrently processed, while the corresponding research is seldom and still open. This paper is devoted to addressing the steady-state scheduling of single-arm cluster tools with multiple wafer types and residency time constraints. Inspired by the definition of wafer flow pattern for the single wafer type, a novel description for the multiple wafer types is introduced. For the sake of efficiency and simplicity, the multiplex backward sequence is proposed. To balance the workload of process steps, a virtual module technology with a two-tiered architecture is implemented. Furthermore, several sufficient and necessary conditions are derived to verify the schedulability of the system. Finally, an efficient algorithm is presented to find the periodic steady-state schedule, and its practicability and availability are validated by the given illustrative examples. Note to Practitioners—Cluster tools are a kind of highly automated, flexible, and integrated equipment applied widely in diversified semiconductor fabrication processes. Due to the strictness of processing constraints and unavailability of in-built buffers, it is challenging to effectively operate cluster tools. For a higher utilization of processing modules, fabs tend to concurrently process several kinds of wafers with dissimilar recipes in a cluster tool. However, the related scheduling and control problems remain open. With residency time constraints, this paper addresses the scheduling problems of single-arm cluster tools with multiple wafer types. By dissecting the mechanism of mixed-processing of multiple wafer types, several formal conditions are obtained to test the schedulability. Based on the multiplex backward sequence, a cyclic scheduling approach to single-arm cluster tools with multiple wafer types is presented. With the proposed method, schedulability conditions can be readily checked and a periodic schedule can be found easily. Thus, it can be applied to solve practical application problems. [ABSTRACT FROM AUTHOR]

This paper addresses the scheduling problem of single-arm cluster tools with both wafer residency time constraints and activity time variation in semiconductor manufacturing. Based on a Petri net model developed in our previous work, polynomial algorithms are proposed to obtain the exact upper bound of the wafer sojourn time delay for the first time. With the obtained results, one can check the feasibility of a given schedule or find a feasible and optimal one if it exists. Illustrative examples are given to show the applications of the proposed method. [ABSTRACT FROM PUBLISHER]