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In this letter, a stitched array of $768\times 64$ pixels for X-ray dental imaging is presented. The sensor architecture allows to increase the frame rate up to 900 fps thanks to a pipeline approach that minimizes the deadtime between consecutive frames. A column-based ADC converts pixel values in digital form while an external FPGA performs the operation of time-delay integration accumulation, thus increasing the signal-to-noise ratio. Internal programmable gain allows to achieve a maximum sensitivity of 2.6 LSB/nGy and, at the same time, to extend the dynamic range of the sensor in case of high intensity. The final system consists of two sensors each one having a size of $74.5\times 9$ mm, assembled in a PCB and coupled with a high sensitive columnar thallium-doped cesium iodide (CsI(Tl)) scintillator for X-ray conversion. The sensor, fabricated in a standard CMOS 0.15- $\mu \text{m}$ technology with a stitching approach, shows a pixel size of 97 $\mu \text{m}$ .

This article reports the design and characterization of a 32 $\times $ 32 single-photon avalanche diode (SPAD) time-resolved image sensor for quantum imaging applications fabricated in a 150-nm CMOS standard technology. A per-SPAD time-to-digital converter (TDC) records the spatial cross correlation functions of a flux of entangled photons. Each 44.64- $\mu \text{m}$ pixel with 19.48% fill-factor features a 210.2-ps resolution, 50-ns (8-bit) range TDC with 1.28-LSB differential and 1.92-LSB integral nonlinearity (DNL/INL). The sensor achieves an observation rate of up to 1 MHz through a current-based mechanism that avoids reading empty frames when the photon rates are low. A row-skipping mechanism detects the absence of SPAD activity in a row to increase the duty cycle. These two features require only three transistors in each pixel. The sensor functionality is demonstrated in a quantum imaging experiment that achieves super-resolution.

This paper presents an efficient and robust circuital implementation of a rail-to-rail input stage with transconductance control, tailored for low-noise operational amplifiers based on differential pairs biased in the sub-threshold region. The proposed g m -control circuit design is indeed based on transistors ratio only, and allows efficient control with scaled currents and dimensions. The architecture guarantees nearly constant performance in terms of bandwidth and power consumption over the whole common mode input range in a power- and area-efficient way. The achievable precision of the transconductance control is also analyzed with transistor equations and its deviation predicted with a simple analytical model, which suggests also a strategy for the minimization of the error by proper tuning. A prototype of the input---output rail-to-rail operational amplifier has been fabricated in a standard 0.35 μm CMOS technology, confirming the validity of the g m -control loop. The amplifier consumes 597 μA from a 3.3 V supply, with an open-loop gain of 107 dB and a gain-bandwidth product of 42.6 MHz.

SPAD-based solid state CMOS image sensors utilising analogue integrators have attained deep sub-electron read noise (DSERN) permitting single photon counting (SPC) imaging. A new method is proposed to determine the read noise in DSERN image sensors by evaluating the peak separation and width (PSW) of single photon peaks in a photon counting histogram (PCH). The technique is used to identify and analyse cumulative noise in analogue integrating SPC SPAD-based pixels. The DSERN of our SPAD image sensor is exploited to confirm recent multi-photon threshold quanta image sensor (QIS) theory. Finally, various single and multiple photon spatio-temporal oversampling techniques are reviewed.

Our recent progress in CMOS single-photon avalanche diode (SPAD) image sensors will be presented. We will highlight areas where these can compete with existing low-light imaging technologies using examples from superresolution microscopy. Article not available.

A 9:8 µm pitch SPAD-based pixel is presented with a novel and scalable Sample and Hold (S/H) Time to Amplitude Converter (TAC) pixel architecture offering the potential to create high spatial resolution Time Correlated Single Photon Counting (TCSPC) image sensors in the future. This pixel pitch is an order of magnitude smaller than previous TCSPC pixels. The NMOS-only TAC performance is measured in a single point TCSPC optical experimental setup. 93ps LSB time resolution is obtained over 80ns dynamic range. Dynamic range limitations are discussed and improvements are suggested. Index Terms—SPAD, Single Photon Avalanche Diode, TAC, Time to Amplitude Converter, TCSPC, Time Corre- lated Single Photon Counting.