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This paper discusses the pertinent issues in designing and developing a DC-DC converter for a low cost, micro power indoor light harvesting system using CMOS technology. The different issues associated to this problem are studied and the relevant literature is analysed. The paper surveys and analyses the design options available for the PV cells, step-up voltage converter circuit architecture, maximum power point tracking (MPPT) methods and energy storage devices. From this analysis a possible solution is discussed. [ABSTRACT FROM PUBLISHER]

This paper presents a current-mode reference shifting solution for MDAC-based ADCs that eliminates the need for external or internal reference voltage buffers, thus improving the energy efficiency and cost of the overall ADC. The solution consists of using an current source connected to the opamp's inputs, where reference shifting occurs by pulling a current through the capacitor in the opamp's feedback loop during the amplification phase, thus, emulating a voltage shift, ΔV = (IΔt)/C. The amount of necessary current, i.e., the biasing of the current source, is controlled by a replica of the converter's stage, which is followed by an integrator and a biasing circuit, all connected in a negative feedback loop. To illustrate the solution's performance, two 10 bit 100 MS/s pipeline ADCs were implemented: one based on the conventional 1.5-bit MDAC and the other based on the proposed circuit. Simulation results show the functionality of the proposed circuit and results for different wirebond inductances prove the stability and performance of the proposed solution. [ABSTRACT FROM PUBLISHER]

This paper proposes a very simple and innovative self-biasing (SB) scheme to be applied to classic fully-differential current starved (CS) ring oscillators. Using the proposed SB circuit, it is possible to reduce, simultaneously, phase-noise and temperature sensitivity of the oscillation frequency. Simulation results from a CS and from the new SB ring oscillator, both designed in a 65 nm 1.2V standard CMOS technology are presented, to validate and demonstrate the efficiency of the proposed new self-biasing scheme. These simulation results show an improvement of about 4 dB in phase-noise (at 1 MHz offset) and, at the same time, it has been verified that the oscillation frequency changes less than 0.71 % (less than 57 ppm/°C), in the temperature range ranging from −40 to 85 °C. Moreover, due to the low noise and low power design, the proposed new SB ring oscillator achieves a simulated figure-of-merit (FOM) of −163.5 dBc/Hz, which represents 8 dB improvement, accomplishing one of the best results when compared with the state-of-the art. [ABSTRACT FROM PUBLISHER]