1. Design of 65 nm CMOS SRAM for Space Applications: A Comparative Study.
- Author
-
Gorbunov, Maxim S., Dolotov, Pavel S., Antonov, Andrey A., Zebrev, Gennady I., Emeliyanov, Vladimir V., Boruzdina, Anna B., Petrov, Andrey G., and Ulanova, Anastasia V.
- Subjects
COMPLEMENTARY metal oxide semiconductor design & construction ,STATIC random access memory chips ,HEAVY ions ,RADIATION hardening (Electronics) ,SINGLE event effects - Abstract
We study the design of different 6T and DICE SRAM blocks based on a commercial 65 nm CMOS technology and discuss the experimental results for X-ray, proton and heavy ion irradiation campaigns. The results obtained show that the number of affected bits depends not only on LET value, but also on the location of a strike. MCU patterns are discussed. The sensitive area is estimated as the whole SRAM cell area after deduction of the region between N+ and P+ guard rings. The results for normally incident particles clearly showed the advantages and trade-offs of different circuit and layout techniques. [ABSTRACT FROM PUBLISHER]
- Published
- 2014
- Full Text
- View/download PDF