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A compositional interchange format for hybrid systems is defined in terms of an interchange automaton, allowing arbitrary differential algebraic equations, including fully implicit or switched DAEs, discrete, continuous and algebraic variables, that can be internal or external, urgency conditions, and operators for parallel composition, action hiding, variable hiding and urgent actions. Its compositional semantics is formally defined in terms of a hybrid transition system. This allows development of transformations to and from other formalisms that can be proven to preserve essential properties, and it allows a clear separation between the mathematical meaning of a model and implementation aspects such as algorithms used for solving differential algebraic equations.

Since Pappas et all. transferred the notion of bisimulation from computer science to control theory, it has attracted quite some attention in the hybrid systems community[1]. Notably, bisimulation relations are used to reduce the complexity of dynamic systems, while preserving reachability notions [1]. In [2], we argued that bisimulation needs to be strengthened with continuity conditions, in order to preserve other control science notions as well. This idea was independently explored in [3,4,5] where modal and temporal logics are extended with topological operators, to be able to reason about robustness of a control strategy for embedded systems.

Embedded systems can be regarded today as one of the most lively research and industrial targets. In this field, the ever-increasing demand for computing power and any sort of system resources continuously challenges state-of-the-art design methodologies and development techniques. The largest part of the most complex issues to be addressed during design and development phases can be related to the need to compromise among tight constrains on performance, memory size, code size, power consumption, appliance weight and dimension, possible real-time behaviors, maintainability, scalability, security, time-to-market and, last but not indubitably least, cost. The designer is continuously challenged by requirements modifications that must be timely addressed, operating at different levels of abstraction, e.g. from the proper adjustment of CPU internals to the scheduler structuring in RTOSs, from the optimized exploitation of I/O devices to the employment of specialized compilation techniques. Suitable solutions to emerging problems in this application field can be found via a joint effort by academia and industry.

International audience; Recent technological advances have led to an increasing gap between memory and processor performance, since memory bandwidth is progressing at a much slower pace than processor bandwidth. Pre-fetching techniques are traditionally used to bridge this gap and achieve high processor utilization while tolerating high memory latencies. Following this trend, new computational models have been proposed to split task execution in two consecutive phases: a memory phase in which the required instructions and data are pre-fetched to local memory (M-phase), and an execution phase in which the task is executed with no memory contention (C-phase). Decoupling memory and execution phases not only simplifies the timing analysis, but also allows a more efficient (and predictable) pipelining of memory and execution phases through proper co-scheduling algorithms. This paper takes a further step towards the design of smart co-scheduling algorithms for sporadic real-time tasks complying with the memory-computation (M/C) model, by proposing a theoretical framework aimed at tightly characterizing the schedulability improvement obtainable with the adopted M/C task model on single-core systems. In particular, a critical instant is identified for M/C tasks scheduled with fixed priority and an exact response time analysis with pseudo-polynomial complexity is provided. Then, we investigate the problem of priority assignment for M/C tasks, showing that a necessary condition to achieve optimality is to allow different priorities for the two phases. Our experiments show that the proposed techniques provide a significant schedulability improvement with respect to classic execution models, placing an important building block towards the design of more efficient partitioned multi-core systems.

International audience; Several task models have been introduced in the literature to describe the intrinsic parallelism of real-time activities, including fork/join, synchronous parallel, DAG-based, etc. Although schedulability tests and resource augmentation bounds have been derived for these task models in the context of multicore systems, they are still too pessimistic to describe the execution flow of parallel tasks characterized by multiple (and nested) conditional statements, where it is hard to decide which execution path to select for modeling the worst-case scenario. To overcome this problem, this paper proposes a task model that integrates control flow information by considering conditional parallel tasks (cp-tasks) represented by DAGs with both precedence and conditional edges. For this task model, a set of meaningful parameters are identified and computed by efficient algorithms and a response-time analysis is presented for different scheduling policies. Experimental results are finally reported to evaluate the efficiency of the proposed schedulability tests and their performance with respect to classic tests based on both conditional and non-conditional existing approaches.

International audience; A major obstacle towards the adoption of multi-core platforms for real-time systems is given by the difficulties in characterizing the interference due to memory contention. The simple fact that multiple cores may simultaneously access shared memory and communication resources introduces a significant pessimism in the timing and schedulability analysis. To counter this problem, predictable execution models have been proposed splitting task executions into two consecutive phases: a memory phase in which the required instruction and data are pre-fetched to local memory (M-phase), and an execution phase in which the task is executed with no memory contention (C-phase). Decoupling memory and execution phases not only simplifies the timing analysis, but it also allows a more efficient (and predictable) pipelining of memory and execution phases through proper co-scheduling algorithms.In this paper, we take a further step towards the design of smart co-scheduling algorithms for sporadic real-time tasks complying with the M/C (memory-computation) model. We provide a theoretical framework that aims at tightly characterizing the schedulability improvement obtainable with the adopted M/C task model on a single-core systems. We identify a tight critical instant for M/C tasks scheduled with fixed priority, providing an exact response-time analysis with pseudo-polynomial complexity. We show in our experiments that a significant schedulability improvement may be obtained with respect to classic execution models, placing an important building block towards the design of more efficient partitioned multi-core systems.

International audience; Different task models have been proposed to represent the parallel structure of real-time tasks executing on manycore platforms: fork/join, synchronous parallel, DAG-based, etc. Despite different schedulability tests and resource augmentation bounds are available for these task systems, we experience difficulties in applying such results to real application scenarios, where the execution flow of parallel tasks is characterized by multiple (and nested) conditional structures. When a conditional branch drives the number and size of sub-jobs to spawn, it is hard to decide which execution path to select for modeling the worst-case scenario. To circumvent this problem, we integrate control flow information in the task model, considering conditional parallel tasks (cp-tasks) represented by DAGs composed of both precedence and conditional edges. For this task model, we identify meaningful parameters that characterize the schedulability of the system, and derive efficient algorithms to compute them. A response time analysis based on these parameters is then presented for different scheduling policies. A set of simulations shows that the proposed approach allows efficiently checking the schedulability of the addressed systems, and that it significantly tightens the schedulability analysis of non-conditional (e.g., Classic DAG) tasks over existing approaches.

In the paper a model problem for the location of a given number $N$ of points in a given region $\Omega$ and with a given resources density $\rho(x)$ is considered. The main difference between the usual location problems and the present one is that in addition to the location cost an extra {\it routing cost} is considered, that takes into account the fact that the resources have to travel between the locations on a point-to-point basis. The limit problem as $N\to\infty$ is characterized and some applications to airfreight systems are shown., Comment: 20 pages, 15 figures, to appear on Discrete Contin. Dyn. Syst

Vibratory loads and noise emission are by-products of the steady flight of helicopter rotors. The fuselage vibrations caused by the vibratory loads from the main rotor affect helicopter ride comfort and have a negative impact both on the fatigue-life of the structure and on functionality of onboard instruments. Furthermore, it is a common experience that the flight of helicopters may be clearly perceived by the hearing of the corresponding sound field generated. In particular flight conditions, the acoustic annoyance from the main rotor may become severe, and this affects the environmental and public acceptance of helicopters. Therefore, the design of a new-generation helicopter has to include the limitation of vibratory loads and noise emission among its goals, and in this context the availability of reliable simulation tools for their prediction is of primary importance. In this chapter, the formulation developed at the Department of Mechanical and Industrial Engineering of University Roma Tre for the derivation of an aeroacousto-elastic simulation tool for helicopter rotors is described, highlighting the important role played by the unsteady aerodynamic model in such a kind of solvers.

Next-generation real-time systems will be increasingly based on heterogeneous MPSoC design paradigms, where predictability and performance will be key issues to deal with. Such issues can be tackled both at the hardware level, by embedding technologies such as TDMA busses, and at the OS level, where suitable scheduling techniques can improve performance and reduce energy consumption. Among these, elastic scheduling has been proved to provide satisfactory results by dynamically reducing task periods at run-time to ensure the highest utilization possible of the processors. On the other hand, elastic scheduling lowers the degree of predictability and increases the complexity of the analysis at the system level. This reduces the benefits given by the TDMA bus, which relies on the high level task analysis for a robust and efficient slot allocation. Starting from this consideration, we propose a system where the elastic scheduling and the TDMA bus work synergistically. We introduce a QoS-aware adaptive bus service which takes the best of both techniques, mitigating their drawbacks at the same time. We show how the overhead introduced by coordination action is small, and it is however dominated by the benefits of the overall strategy in terms of performance and predictability guarantees.

This paper considers piecewise affine models of genetic regulatory networks and focuses on the problem of detecting switches among different modes of operation in gene expression data. This task constitutes the first step of a procedure for the complete identification of the network and complements the algorithms proposed in (Drulhe et al., 2006). We propose two methods for switch detection. The first one is based on the computation of suitable indexes that emphasize the occurrence of switches in the data. The second one exploits nonlinear identification techniques in order to recast switch detection into an hypothesis testing problem. In both cases we assume that the expression of individual genes obeys to an output-error piecewise affine dynamics and we study the performance of the proposed algorithms for different noise levels. We also illustrate the application of our methods to the reconstruction of switching times in data produced by a piecewise affine model of the network regulating the carbon starvation response in Escherichia coli.