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Accurate peak power measurement requires detailed switching and delay information for each signal over the entire simulation. Performing a full signal dump and power calculation for a long simulation run usually spends a large amount of time and disk space. In this paper, we propose an Essential-signal-based methodology which only performs power analysis over a small subset of the original simulation but still acquires the true peak power value. Experimental results show that the proposed methodology significantly decreases both time (about 18 X speedup) and disk space usage (about 87% reduction) against the traditional power analysis flow.

Embedded memory diagnostics is normally done by the built-in self-diagnosis (BISD) hardware, which collects and sends the diagnostic data to the external tester. The cost of the diagnosis process highly depends on the data volume sent between the chip under test and the tester, since the transmission time and the tester capture memory are major cost factors. We propose a memory BISD design using differential addressing, as well as a method for evaluating and choosing a proper differential address level. Based on our previous work on pattern identification BISD and syndrome compression design, the proposed differential address compression scheme further reduces the diagnostic data volume. Experimental results show that the BISD design is cost-effective.