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Curve is the traffic accident-prone area in the traffic system of the structural road. How to effectively detect the lane-line and timely give the traffic information ahead for drivers is a difficult point for the assisted safe driving. The traditional lane detection technology is not very applicable in the curved road conditions. Thus, a curve detection algorithm which is based on straight-curve model is proposed in this paper and this method has good applicability for most curve road conditions. First, the method divides the road image into the region of interest and the road background region by analyzing the basic characteristics of the road image. The region of interest is further divided into the straight region and the curve region. At the same time, the straight-curve mathematical model is established. The mathematical equation of the straight model is obtained by using the improved Hough transform. The polynomial curve model is established according to the continuity of the road lane-line and the tangent relationship between the straight model and the curve model. Then, the parameters of the curve model equation are solved by the curve fitting method. Finally, the detection and identification of the straight and the curve are realized respectively and the road lane-line is reconstructed. Experiments show that this method can accurately identify the curve lane-line, provide effective traffic information, make early warning, and it also has certain universality.

To circumvent the poor prediction accuracy of traffic volume models available due to the lack of traffic data and inaccurate judgments on the traffic influence factors, in this paper we established a traffic volume prediction model using grey forecasting model GM(1,1) based on the real traffic data from the highway toll database. The GM(1,1) method has advantage of the strong adaptiveness to Complex system, thus getting a great advantage over other methods for modeling such a complex nonlinear traffic volume system with many uncertain influence factors. Simulation results show that our GM(1,1) model has mean relative prediction error of 3.9%, which accomplishes our intended prediction accuracy.

The deficiency of predistortion performance exists in indirect NN (Neural Network)-predistorter learning methods for nonlinear high power amplifiers (HPAs), and direct NN-predistorter learning methods possess great computational complexity. To circumvent these problems, in this paper we propose a novel NN-predistorter learning method with its structure developed by using some properties of nonlinear operators and its corresponding algorithm derived by using an approximation formula. The proposed method is based on the identification of NN post-distorter of the HPA, and then directly implements the efficient Levenberg-Marquardt back propagation algorithm. Thus, compared with the direct NN-predistorter learning method, our proposed method reduces the computational complexity and still keeps slightly better predistortion performance. Theoretical analysis and simulation results also show our proposed method outperforms the indirect NN-predistorter learning method in the term of about 5 dB adjacent channel power ratio improvement.

TinyOS is a key element of the software infrastructure for the research and development involved in realizing wireless sensor networks (WSNs). In this paper, a priority-based scheduling strategy is proposed and implemented. Furthermore, the proposed approach and the original mechanism are tested and compared in the laboratory environment. Test result indicates that the modified strategy greatly improved the system performance for real-time tasks.

Our goal is to establish a simple technique for dynamic human body tracking based on image sequence. In this paper, we present a novel method of template matching and predictive tracking for moving body in clutter background. The method exploits the fact that moving human body changed in approximate rigid parts. First, we use the moving difference to find the region of interest, then we make a template of a target through the morphology algorithm using the skeleton of the object, and by revising the mask combined Kalman predictive tracking method to archive real-time tracking. It has been proved that in clutter background and noisy situation this algorithm is still efficient.

Binary Translation is a migration technique that allows software to run on other machines achieving near native code performance. The paper proposed an abstract machine-based dynamic translation technique in Java processors. The technique employs the “mock execution” of the hardware abstract machine (HAM) to identify and analyze the dependency among Java programs, dynamically translate Java bytecode into tag-based RISC-like instructions. After that, stack folding is combined with the technique to further optimize translated instructions. We used the technique to realize a Java ILP processor. To further describe the technique's availability, we extended the Java processor to design a multithreading Java processor, and explained its some new features.

Most modern file systems provide journaling method instead of traditional file system check routine for fast recovery and consistency guarantee from unexpected crashes. For clustered file systems with shared storage, to improve the performance of journaling, each node gets its own journal space and each journal can be on its own disk for greater parallelism. After a failure, file system consistency is restored quickly by simply re-applying all updates recorded in the failed node's journal. However, for file system operations involving multiple nodes, this method may not be efficient enough as lock mechanism has to be employed in most cases, which may cause poorer performance and more recovery time. By introducing specific journal storage to record the transactions involving multiple nodes, an enhanced lock-free journaling method is presented in this paper, which can improve the performance of journaling operations involving multiple nodes, and then shortens recovery time from crashes. A Linux-based concept-proofing implementation has been applied in self-developed clustered file system.

Aiming at the complex dynamic feature of large ship, an intelligent control structure based on Library-similar Knowledge-increasable Neural Network Group is presented. This compounded control structure using the dynamic knowledge-increasable learning capability of the neural network groups, solve the problems of online identification and online design of the controller, so that the high precise output tracking control of uncertain nonlinear large ship can be realized. Simulating results show that it is feasible and effective.

Aiming at the complex dynamic feature of large ship, an intelligent control structure based on Library-similar Knowledge-increasable Neural Network Group is presented. This compounded control structure using the dynamic knowledge-increasable learning capability of the neural network groups, solve the problems of online identification and online design of the controller, so that the high precise output tracking control of uncertain nonlinear large ship can be realized. Simulating results show that it is feasible and effective.

Flash memory is a kind of common storage device. Its characteristics of flexibility, low power, and so on offer excellent qualifications for embedded system and mobile system. But flash memory must be written after erasure operation, and the most important thing is that the erasure operation times are very limitable. For assurance of long time availability, data must be distributed over all memory space reasonably and politic, which brings forward challenge for storage system designer. This paper analyses the data structure and physical characteristics of typical flash memory. And a static trigger wear-leveling strategy based on classifying data with trigger condition is brought forward, called STWL. STWL forces these static data to move over all memory space according to the trigger condition so as to avoid some certain data blocks being damaged in advance. An experiment is carried out to simulate this strategy using VHDL. We construct a 4M bytes RAM as flash memory simulation model, a static wear-leveling unit to implement STWL and an excitation generation unit to yield memory store/load operations, As a result, the wear-leveling rate improves. 33% of space recycle times can be reduced and the biggest gap of number of erasing times of data block decreases from 883% to 38%.