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Forming free and thermally stable bipolar resistive switching behavior was observed in the memory devices composed of graphene oxide (GO) thin films on ITO coated glass substrate with Platinum (Pt) as the top electrode. The switching between the low resistance state and high resistance state showed a reliable and repeating behavior with an on/off ratio of 104 at room temperature. The Pt/GO/ITO device showed metallic and semiconducting characteristics in low and high resistance states, respectively, when resistance was measured as a function of temperature. Ohmic conduction was found to dominate in all regions of switching operation except for the high voltage regime of high resistance state where space charge limited conduction was found to be the main mechanism of current conduction. The device showed good endurance up to 104 s and retention characteristics up to 100 cycles with on/off ratio ∼104. The switching mechanism was found to be governed by migration of oxygen between GO layer and bottom ITO electrode, which was further confirmed by Raman Spectroscopy. The device exhibited stable bipolar switching characteristics with good retention and endurance properties at high temperatures up to 500 K. The graphene oxide based memory devices fabricated by simple chemical method have potential in the field of nonvolatile memory applications well above the room temperature. [ABSTRACT FROM AUTHOR]

Multilevel cell (MLC) capability of a memory device is an attractive alternative to realise high integration density of memory arrays. In addition, power efficient memory cell along with MLC capability has huge potential in neuromorphic computing and data storage applications. In this study low power, high speed and 3-bit multilevel bipolar resistance switching operation is reported in TiO2 thin films where copper is used as counter electrode. On account of using an oxidisable electrode, low programming voltages (∼+0.2 V, −0.1 V) along with low reset current (∼10 µA) are observed, thereby ensuing low power (∼µW) memory operation. Additionally, observation of fast switching (∼250 ns) translated to ultra-low energy (∼pJ) consumption. By varying compliance current (IC) from 25 µA to 1.6 mA during the set process, eight distinct non-volatile resistance states are reliably obtained, which showed statistically significant and non-overlapping resistance distribution. The multilevel resistive switching in Cu/TiO2/Pt device is explained by considering filamentary the widening phenomenon in the electrochemical metallization memory cell. Numerical calculations revealed that increase in the diameter of the metallic conducting filament from ∼3 nm to 70 nm with increasing IC is accountable for multiple low resistance states. The results of this study are promising towards realisation of emerging memory devices with low operating power, fast switching operation and high spatial density. [ABSTRACT FROM AUTHOR]

Abstract: A novel multilevel resistive switching was observed in trilayer stacked geometry composed of graphene nano flakes sandwiched between polyvinylidene fluoride layers fabricated by spin coating method, which are expected to fulfill the need of high density data storage memories. External parameters such as current compliance and induced voltage pulse imposed on the devices provided an aid to tune the inherent resistance states. As fabricated devices exhibited multi level switching with stable resistance ratios between different resistance states having excellent data retention and endurance. Space charge limited conduction and Fowler–Nordheim (F–N) tunneling were found to be responsible for the switching mechanism. Graphene enriched with trapping sites provides the adequate environment for F–N tunneling process to occur, resulting in multi-bit resistance states. [Copyright &y& Elsevier]

Multilevel resistive switching was observed in random access memory device using amorphous SmGdO3 (SGO) ternary oxide thin films. Non-volatile and stable 4-level resistance states with sufficient margin of resistance ratios were observed by varying compliance current which was attributed to compliance current dependent variation in size of conducting filaments. As fabricated Pt/SGO/Pt devices exhibited excellent switching parameters such as stable resistance ratios of reset (ON) to set (OFF) states, non-overlapping switching voltages, excellent data retention, and endurance. Temperature dependent variation of resistances of ON and OFF states of the device was studied to elucidate current conduction and resistive switching mechanisms. [ABSTRACT FROM AUTHOR]

The resistive switching phenomenon is attributed to local formation and rupture of conductive filaments (CF), however some aspects of the switching mechanism still need wider consensus. The origin of resistance contribution to low resistance state (LRS) and high resistance state (HRS) is although well known, the origin of capacitive contribution to the memory state of resistive random access memory device (RRAM) is ambiguous. Here we report impedance spectroscopic studies carried on Cu/TiO 2 /Pt devices to address the origin of resistive and capacitive contribution, where the effect of DC bias voltage, reset stop voltage and set compliance current on the impedance of RRAM memory states were investigated in detail. The studies revealed that the capacitive contribution was dominated by the surrounding TiO 2 bulk and contrary to existing knowledge, gap formed owing to ruptured CF has negligible role. These studies also reaffirmed the origin of the resistive contribution to the HRS and LRS state, which was dictated by the ruptured gap and connected CF, respectively. Results of this study may be significant towards improving the switching time and operating frequency performance of futuristic memory, RF switch and neuromorphic computing applications of RRAM devices. [ABSTRACT FROM AUTHOR]