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Coupled inductor single-input dual-output (CI-SIDO) converters are promising converters used in the applications that demand multiple voltage supplies due to their high efficiency and small volume. However, this class of converters suffers from poor cross-coupling and cross-regulation issues, which affects the dynamic performance and stability. These issues can be suppressed with peak current mode control because of its faster dynamic response. To design the controller and study dynamic performance, a small-signal model of the system is essential, which consists of a converter model and current modulator model. However, developing the current modulator model for PCM controlled CI-SIDO converters is challenging because it consists of two reference current for two inductor currents each consisting of three slopes. No literature is available that derives a unified model of PCM controlled CI-SIDO converters. Therefore, this paper proposes a unified small-signal model for PCM controlled CI-SIDO converters. The proposed model is applicable to three topologies of CI-SIDO converters, i.e., CI-SIDO buck, CI-SIDO boost, CI-SIDO boost and buck converter. The proposed unified model is a useful tool to study the dynamic performances, stability and design outer controllers. Finally, the accuracy of the proposed unified model is verified by performing simulation and experiment of PCM controlled CI-SIDO converters considering inner-loops closed.

A very high-light-load-efficiency, low-ripple-voltage pulse-frequency modulation (PFM) buck converter for IoT applications is presented in this paper. The PFM buck converter is widely used because of its higher light-load efficiency. However, it has a higher ripple voltage than its pulse-width modulation counterpart. Although the ripple voltage of a PFM buck converter can be reduced by increasing the output capacitance, we find that this leads to a decrease in the light-load efficiency due to increased controller loss. This problem is analyzed and verified by IC measurements in this work. The proposed PFM buck converter remarkably reduces the controller loss even at low ripple voltages by replacing the static comparator with a dynamic comparator, which provides a high voltage gain, fast evaluation speed, and low power consumption. In addition, to further reduce the controller loss, a dynamic shut-down control method, which selectively turns off control circuits, is used. The proposed PFM buck converter was fabricated with 0.35 m CMOS technology. The magnitude and variation of the output ripple voltage are 3 and 2 mV, respectively, and the light-load and peak efficiencies are 81.1% and 94.8%, respectively.

Two issues plaguing the on-time control DC-DC buck converter are the system instability caused by low equivalent series resistance (ESR) output capacitor and the great variation on switching frequency caused by input/output voltage and load current. Without additional external components or integrated clock controlled circuits and RC filters, the reference and frequency compensation (RFC) technique is presented in this paper to stabilize the converter and eliminate its switching frequency variation issue with low ESR output capacitor. The proposed frequency stable on-time control buck converter with input voltage ranging from 4.5 V to 30 V and output load ranging up to 6 A was fabricated using a standard 0.25 m BCD (BiCMOS/DMOS) process. With low ESR ceramic output capacitor, the experimental results show that the converter functions properly and stably over the whole load range, and the switching frequency variation with load current is constrained to 3.8 KHz/A, which is a fairly constant value. Moreover, the peak efficiency of the converter is about 98% and the load transient response is also shown excellent performance with the load stepping from 0.1 A to 6 A.

This paper presents design and evaluation of a Quadratic Buck Converter (QBC). A step-by-step procedure to select the converter’s component values and semiconductor device ratings is demonstrated. A prototype QBC with a simple closed loop output voltage control is constructed and experimentally evaluated. It is shown that the converter performs well within the design specification, has good output voltage regulation and fast transient response, and achieves the highest efficiency of 82%.

Constant power loads (CPLs) may cause instability of direct-current (DC) distribution networks. This paper studies the existence and stability of equilibria of DC distribution networks where the sources are buck converters under droop control, the cables are resistances and inductances, and the loads are ZIP (constant impedance, constant current, constant power) loads. Particularly, a sufficient and necessary condition that guarantees the existence of equilibria is determined. Then, the conditions to guarantee that the system has at least one stable equilibrium are determined. Firstly, a sufficient condition for power-flow solvability of the DC distribution networks is obtained based on the monotone convergence theorem. Then, the sufficient and necessary condition is obtained based on successive approximations. When the system has multiple equilibria, it is proved that only the high-voltage equilibrium is stabilizable and all the low-voltage equilibria are inherently unstable and unstabilizable under droop control. Moreover, the robust stability condition for the high-voltage equilibrium is obtained by analyzing the eigenvalues of the linearized system dynamics. Overall, the obtain

To enhance the stability and robustness of the DC converter, a two-dimensional (2D) iterative learning control method suitable for the Buck converter is proposed. This control method is derived through a continuous-discrete model. Combining the error dynamics equation and the iterative learning method(ILM) described with Roesser theory, effective learning rules and sufficient conditions for convergence are obtained. By contrast with the iterative learning algorithm of the conventional Buck converter, this algorithm clarifies the learning gain, deeply learns the structure and parameters of the converter, and obtains an accurate learning dynamics model. Moreover, numerical simulations of the Buck converter with specific circuit parameters are also conducted. The simulation results demonstrate that the control learning rules are less restrictive with a swift transient response, which are robust without complex feedback compensation circuits. Thereby, it elucidates a new approach to the application of the Buck converter.

Modeling accuracy of DC-DC converters may deviate largely in the presence of different variation levels of constant power loads (CPLs), hence is well acknowledged as a main hurdle for the design of advanced model-driven control strategies in the literature. Aiming to enhance the bus voltage regulation performance of DC-DC buck converters, a model-free deep reinforcement learning (DRL) control strategy is proposed in this brief. Firstly, a Markov Decision Process (MDP) model and a deep Q network (DQN) algorithm are utilized for the stabilization issue of the converter. Secondly, through a subgoal reward/penalty mechanism, the control objective and prescribed performance of the system are therefore guaranteed. Moreover, a specified action space is designed to match the switch speed of the switching element. As a distinguishable feature, the settling time under the proposed control scheme is significantly reduced in the occurrence of disturbance, resulting from the fast adaption ability of DRL. The simulation comparison results in reference to PI and fuzzy PI controllers demonstrate the efficacy and superiorities under large signal perturbation conditions.

This study aims to accomplish the output voltage tracking task for buck converters without current feedback, diminishing the performance degradation from model-plant mismatches and load variations. The following contributions overcome these difficulties: a) the combination of Luenberger and disturbance observer (DOB) techniques for a parameter-independent voltage-derivative observer, b) the pole-zero cancellation control incorporating the DOB and active-damping injection techniques, and c) the exponential convergence guarantee to the target tracking system subject to the variable convergence rate mechanism. Convincing experimental evidence confirms the effectiveness of proposed tracking control using a prototype 3-kW buck converter control system.

This study presents a simple and systematic approach to synthesize a robust adaptive fuzzy fractional-order nonsingular terminal sliding mode controller (AFFO-NTSMC) to improve the output voltage tracking control performance of the DC-DC buck converters. The hybrid control method of fractional-order (FO) calculus and non-singular terminal sliding mode control (NTSMC) are combined to create a fractional-order non-singular terminal sliding mode control (FO-NTSMC), in which a new fractional-order non-singular terminal sliding mode surface is established. The idea behind this strategy is the increased flexibility achieved by fractional-order calculation, improving robustness to disturbances and parameters variations provided by traditional sliding mode controllers (SMCs) as well as finite time convergence properties of the output voltage error to the equilibrium point during the output load changes, simultaneously. In addition, a fuzzy logic system with online adaptive learning algorithm is designed to provide smooth chattering in switching control signal. The stability of the closed-loop system is carefully demonstrated by Lyapunovs theorem. Experimental measurements from a laboratory prototype are presented to demonstrate the effectiveness of the proposed AFFO-NSTSMC algorithm.

Over the last decade, there has been a constant development in control techniques for DC-DC power converters which can be classified as linear and nonlinear. Researchers focus on obtaining maximum efficiency using linear control techniques to avoid complexity although nonlinear control techniques may achieve full dynamic capabilities of the converter. This paper has a similar purpose in which a novel hybrid metaheuristic optimization algorithm (AEONM) is proposed to design an optimal PID controller for DC-DC buck converter’s output voltage regulation. The AEONM employs artificial ecosystem-based optimization (AEO) algorithm with Nelder-Mead (NM) simplex method to ensure optimal PID controller parameters are efficiently tuned to control output voltage of the buck converter. Initial evaluations are performed on benchmark functions. Then, the performance of AEONM-based PID is validated through comparative results of statistical boxplot, non-parametric test, transient response, frequency response, time-domain integral-error-performance indices, disturbance rejection and robustness using AEO, particle swarm optimization and differential evolution. A comparative performance analysis of transient and frequency responses is also performed against simulated annealing, whale optimization and genetic algorithms for further performance assessment. The comparisons have shown the proposed hybrid AEONM algorithm to be superior in terms of enhancing the buck converter’s transient and frequency responses.

This paper proposes a driver integrated circuit (IC) for a GaN-based synchronous buck converter to minimized the dead-time loss of GaN devices and improve converter efficiency. The proposed adaptive control achieves minimized dead-time for any loading condition. A driver IC is fabricated in a 0.18 lm BCD process to verify the concept. The measurement result achieves only 0.7 ns and 0.8 ns dead-time at the minimum and maximum load condition, respectively. The efficiency improves 2.1% at 2 A full load compared to the fixed dead-time control counterpart.

The buck converter is frequently introduced in the industry to maintain the stability of the voltage output when having the interference suddenly. In order to promote the robustness of the buck converter, a novel hybrid H2 model following control (HHMFC) is developed based on digital redesign sliding mode control in this article. First, we design H2 model following SMC in the continue-time domain. Then, by using the digital redesign approach, the continuous SMC is redesigned to a corresponding discrete-time SMC and the proposed HHMFC is achieved. Finally, we apply the developed HHMFC to realize a robust buck converter. With both the simulation and experiment results, we can conclude that the proposed HHMFC can easily and successfully apply to the practical realization for the buck converter with better robustness performance.

The speed regulation problem with only speed measurement is investigated in this paper for a permanent magnet direct current (DC) motor driven by a buck converter. By lumping all unknown matched/unmatched disturbances and uncertainties together, the traditional active disturbance rejection control (ADRC) approach provides an intuitive solution for the problem under consideration. However, for such a higher-order disturbed system, the increase of poles for the extended state observer (ESO) therein will lead to drastically growth of observer gains, which causes severe noise amplification. This paper aims to propose a new model-based disturbance rejection controller for the converter-driven DC motor system using output-feedback. Instead of estimating lumped disturbances directly, a new observer is constructed to estimate the desired steady state of control signal as well as errors between the real states and their desired steady-state responses. Thereafter, a controller with only speed measurement is proposed by utilizing the estimates. The performance of the proposed method is tested through experiments on dSPACE. It is further shown via numerical calculations and experimental results that the poles of the observer within the proposed control approach can be largely increased without significantly increasing magnitude of the observer gains.

For the digitally controlled buck converters, the nonlinearity and time periodicity, caused by the pulsewidth modulator (PWM) and sample and hold, make the accurate frequency-domain analysis intractable. In this article, based on the harmonic transfer function (HTF) approach, a precise small-signal continuous-time modeling for the digitally controlled Buck converter operating in continuous-conduction mode (CCM) under constant-frequency voltage-mode control is presented. The sideband components on the closed-loop control are embedded in the model. Thus, this model is accurate within the full frequency domain region, which breaks the limit of Nyquist frequency. Furthermore, by overcoming the barrier of infinite series introduced by the sideband effects, the analytical loop gain expression is derived, which contributes to accurate stability assessment and reduction of computation burden. In addition, the proposed exact small-signal model has explained the reasons why different information injection points lead to different measured loop gains. Simulations and experimental results are conducted to verify the effectiveness of the proposed method.

In this article, a modular output series-parallel series resonant converter (SRC) differential buck converter is analyzed for high-power, ultra-wide-voltage applications such as battery formation systems and bench-type power supplies where a zero voltage discharging function is required. An independent control method in one module is proposed to increase the efficiency of the converter compared to the conventional complementary control method. In the modular output-series connection, higher efficiency can be achieved by shedding needless modules in the low voltage range. Module shedding and activating techniques are proposed to eliminate current and voltage transients during a mode change under any load condition without the use of additional bypass switches. In addition, when a fault occurs in one module, its effect on the other module is analyzed. A practical solution involving turn- off processes for fail-safe operation is proposed, which reduces current stress and voltage spikes on devices and effect among modules without depending on the external signal from the central controller and the communication delay. A prototype of a modular series-parallel SRC- differential buck converter is implemented to verify the proposed concept.

It is well-known that the ripple control technique benefits from fast load transient response and small cross regulation for single-inductor dual-output (SIDO) dc–dc converter. However, existing capacitor current ripple (CCR) controlled SIDO buck converter suffers from incomplete operation state and single switching path. Thus, it has a limited stable load range. In order to extend the stable load range and suppress cross regulation of SIDO buck converter in continuous conduction mode (CCM), a novel ripple control technique, called as capacitor current and capacitor voltage ripple (CCVR) control, is proposed in this article. The operation principle of the proposed CCVR controlled SIDO CCM buck converter is presented, and its discrete iterative map model is established. Furthermore, the stability and stable load range have been discussed by using bifurcation diagrams. Based on the established small signal model, Bode plots are given to show the performance in suppressing cross regulation. Finally, simulation and experiment results are provided to verify the theoretical analysis. It shows that the proposed CCVR control technique can be applied to SIDO CCM buck converter to extend its stable load range and suppress its cross regulation.

The multilevel connected dc–dc converters system is considered a practical technology to increase the capacity and reduce voltage and current stresses on the power devices. In practice, mismatched parameters are inevitable, which increase the challenge of output voltage regulation and current sharing control. In order to conquer these difficulties, this article investigates the current sharing based on incremental passivity control for multilevel connected dc–dc converters. Combined with passivity-based control, a finite-time estimator is given to improve the robustness against the load variations. The proposed method results in a linear control law despite the bilinear nature of this system. Moreover, analysis exhibits that stability and current sharing are independent of inductor parameters. Furthermore, stability of the closed-loop system has been proved that the proposed approach is valid both for a linear and nonlinear load. After introducing the proposed control scheme, simulation and experiments are offered to validate its fast transit response and antidisturbance performance.

An ultra-low quiescent current tri-mode DC-DC buck converter is presented in this paper, which is able to handle a 100,000X load range. In pulse width modulation (PWM) and pulse frequency modulation (PFM) mode, adaptive on-time (AOT) V² control is utilized to achieve seamless mode transition and constant switching frequency in PWM mode. A deep green mode (DGM) is proposed for light load, where both the switching loss and the power of control circuitry are minimized. By reducing the comparator current, a delay-based hysteresis window adaptive to load current is generated, reducing the switching frequency and the loss. Meanwhile, the average current of zero current detector (ZCD) and AOT controller are reduced significantly by dynamic biasing. As a result, the efficiency of the converter is improved while maintaining a reasonable output ripple. The proposed converter is implemented in a 0.18μ m BCD technology. Experimental results show that the converter can provide a 1.6 V output from a 2.7 to 4.7V input for 1μ A to 100 mA load, while consuming only 490nA quiescent current. The proposed converter achieves a 92.1% peak efficiency and efficiency can be maintained above 80% in a load range of 20μ A to 60 mA.

This article proposes a controller for dc–dc converters to achieve fast load-transient responses. The controller is developed for both continuous conduction mode (CCM) and discontinuous conduction mode (DCM) of operation. The main idea is developed for buck converters, but it is shown that the proposed controller can be applied to other topologies, such as the noninverting buck–boost converter. The controller derivation, analysis, and experimental verifications are provided in both CCM and DCM, and its performance is compared with other methods. The main advantage of the proposed controller is that it minimizes the recovery times associated with load-transient responses in dc–dc converters while maintaining component sizes and other system parameters within the acceptable range. The proposed controller can be used to minimize load transients in electronic portable devices and electric vehicle charging.

An in-depth analysis on the load transient operation of a buck converter with auxiliary current control is presented in this article. The analysis quantifies the effects of nonideal characteristics, such as the equivalent series resistance, inductor current and output voltage ripples, time delay, and slew rate of the load current, on the fluctuation of the output voltage in a practical implementation. The analysis results reveals that some of the non-idealities may cancel each other out and become negligible in the implementation. A design considering the nonidealities can achieve the transient-wise capacitor charge balance of the output capacitor and minimize the output voltage deviation during the load transient. The agreement between the simulation and experimental results validates the effectiveness and precision of the proposed analysis and design.

This paper studies the voltage regulation problem of Buck converter under current constraint. Firstly, to speed up the voltage regulation, a nonlinear algorithm is proposed to make the output voltage track the reference voltage quickly in a finite time. Meanwhile, to protect the devices in the circuit, the current-constraint problem is also considered in the finite-time controller design. In addition, the situation of load change is also considered. The proof of finite-time stability of the total closed-loop system is given and its validity is fully tested. Finally, simulation and experiment verify that the system has excellent dynamic performance and steady-state performance.

Common-source inductance (CSI) is proven to be detrimental for high-speed switching. It can significantly slow down switching speed and increase switching losses. Recent research also demonstrated a self-turn- on phenomenon during the device turn- off transient in a simple buck converter. Yet there is lack of literature investigating the impact of CSI in circuits using bidirectional devices. This letter aims to first demonstrate and then reveal the mechanism of a unique turn- off voltage overshoot and oscillation phenomenon in converters using active bidirectional devices. The issue is found to be associated with the CSI in the bidirectional devices and can result in more than 100% voltage overshoot and significantly higher switching loss during the turn- off transient. Practical solutions are also provided to attenuate or eliminate the detrimental effects. The phenomenon and provided analysis are demonstrated and verified on a custom-built SiC-based matrix converter phase-leg.

It is known that constant power load (CPL) may cause a negative impedance, which seriously affects the stability of power system. In this paper, a new control algorithm for DC–DC buck converter feeding unknown CPL is proposed. First, under the assumption of known extracted power load, the standard passivity–based control (PBC) is presented to reshape the system energy and compensate for the negative impedance and a proportion-integration (PI) action around passive output is added to improve disturbance rejection performance, which forms the PBC plus PI (PBC+PI). Then, a parameter estimation algorithm is developed, based on immersion and invariance (I&I) technique, in order to online estimate the extracted power load. In the next step, the online estimation scheme is adopted to construct an adaptive strategy. Finally, the stability analysis of the cascaded system containing a closed-loop control system and observer error dynamics is conducted. Simulation and experimental results are demonstrated to validate the performance of the proposed controller.

This paper proposes a method for selecting the parameters of the main components of an autonomous photovoltaic (PV) stations to ensure the most efficient conversion and use of solar energy. The main energy characteristics are analyzed and the mathematical models of the components of an autonomous PV system are developed to study the modes of tracking the maximum power point (MPP). The necessary conditions for matching the parameters of the PV and the DC–DC buck converter are evaluated to track the MPP. This paper aims to create an original method and algorithm for calculating and selecting parameters of the main elements of a PV stations. The optimal value of the sampling time of the MPP controller is obtained for different schemes of the PV system . A practical example is considered for selecting the parameters of a DC–DC buck converter and a digital MPP of an autonomous PV station. The simulation of dynamic modes of an autonomous photovoltaic (PV) station is performed in the MATLAB/SIMULINK software package. The simulation results of dynamic operations of the PV system show that the voltage converter and the MPP controller with the selected parameters according to the proposed method provide reliable and effective tracking of the MPP in all different connections of the PV.

Constant on -time control (COT) has been widely adopted in buck converters because of its simplicity, fast transient response, and high light-load efficiency. However, the increasing power demands of CPUs and AI/ML engines is pushing voltage regulators to support higher output currents, which typically requires the use of multiphase operation. However, since most high-performance COT schemes utilize ripple as a control variable, the ripple cancellation point in multiphase designs imposes difficult stability concerns, limiting performance, and robustness. In this article, a novel ultrafast transient COT (UFTCOT) control scheme is proposed to enable fast and robust operation even in multiphase converters. The small-signal models of the proposed control scheme are derived based on a describing function technique, whose theoretical results are compared, along with simulation and measurement results, to contrast the proposed UFTCOT technique to exiting approaches.

This chapter is devoted to using the loop‐breaking 2 (LB 2) method to solve a two‐level voltage source converter (VSC). An example of a dc‐dc buck converter is used to demonstrate how augmented matrix methods can be easily incorporated into the LB 2 method, which avoids evaluating convolution integrals. To obtain the expressions for the VSC, the open‐loop equations, consisting of both the power converter and the controllers for the VSC, need to be formulated. The chapter demonstrates how a VSC, whose controllers are described in the dq frame, can also be modeled by the LB 2 method. It presents different case studies to compare the number of unknown variables required to simulate a two‐level VSC based on the LB 1 and LB 2 methods, under different switching frequencies. Finally, the chapter shows how a line‐commutated power converter can be modeled by means of the LB 2 method.

A key challenge of DC–DC converters is designing an appropriate controller for reaching the output voltage to steady-state in a limited time with small variation. In addition, the parameters of converters may be affected by different factors that can make difficulties to voltage regulation. Robust control theory is a significant method to deal with this problem. Despite high efficiency, the high-order robust controllers may not be feasible for real-time implementation due to the hardware and computational limitations. In this paper, we study the swarm-based robust controller design with fixed-structure for DC–DC converter using the Kharitonov approach. The developed algorithm allows implementing the simple structure controllers that guarantees both robust stability and performance. The controller behavior is validated and compared with other related works. Experiments are provided to demonstrate the feasibility of the designed controller.

This paper presents a novel sliding mode controller based on an extended state observer (ESO) in the presence of matched and mismatched disturbances for a DC–DC Buck converter. Firstly, stability of ESO is proved by introducing a proper Lyapunov function. Then, by proposing a sliding surface containing system and ESO states, a novel nonlinear controller is designed to satisfy sliding condition. The proposed controller shows a superb disturbance attenuation which guarantees finite time stability of the closed-loop system. Moreover, reaching time to the sliding surface is analysed and upper bound of this time is obtained. Finally, simulation results and comparisons with previous research works reported in the literature demonstrate superiority of the proposed method.

In this brief, we provide three operational boundaries in closed analytical form for a Constant ON-Time buck converter working in continuous current mode. Two of these boundaries are related to the sudden appearance of pulse-bursting induced by either (i) the hysteresis of the comparator that drives the input of the block implementing the circuit control algorithm ( hysteresis condition ), or (ii) by a period doubling bifurcation ( bouncing condition ). The third operational boundary corresponds to the saturation condition of the circuit controller which does no longer guarantee an OFF-time larger than the minimum allowed one. These stability boundaries are provided both for the adaptive and the fixed ON-time working modes.

This paper introduces an accurate frequency regulation method based on a constant on-time (COT) buck regulator designed for point-of-load (POL) regulation with a fast load transient requirement and wide load range. Traditional COT regulators suffer from frequency shift due to load variations. The proposed frequency adjustment circuit helps the COT control engine to reach its target frequency of operation by adjusting the on-time pulse under varying conditions. This circuit includes a phase detector and a voltage-to-current converter block. The phase error between the target clock signal and the PWM is directly used to adjust the width of the on-time pulse. This will fine-tune the bandwidth of the frequency regulation loop, which can help to improve the transient performance of the COT as well. The fabricated chip has been tested under 20A/ $\mu \text{s}$ load transient speed with a 10A load step condition. The measured silicon performance shows that the error of the switching frequency is less than 0.16% in the 400kHz to 1MHz range during steady-state operation.

In this article, the design of a fault detection and isolation (FDI) system for a flyback converter, based on a fuzzy unknown input observer, is presented. The proposed FDI system aims to detect the saturation in the inductor core as a fault, considering the current increment can cause an avalanche effect provoking a failure in the system. A Takagi–Sugeno model of the flyback converter is used. The observer's convergence and the stability of the fault diagnosis system are guaranteed by Lyapunov's theory and the estimation error used to determine the necessary LMIs. A comparison of different FDI methods applied in fuzzy systems is performed in order to select the most robust system, capable of estimating the current in the system even in the presence of external disturbances. The system validation is performed in both, simulation and online implementation, using experimental data.

This article presents an improved optimum damping current-mode buck converter with fast-transient response and small-transient voltage using new current sensing circuits. The improved optimum-damping circuit, consisting of the dynamic slope generator and the proposed rail-to-rail current sensor, can stabilize the converter during the output current change and can accelerate the transient response to achieve better figure of merit performance. The dynamic slope generator can compensate the slope to prevent subharmonic oscillation issue and lower undershoot/overshoot without an extra slope compensator. The proposed rail-to-rail current sensor increases the input voltage range, accurately captures the inductor current information, and accelerates the transient response as the load current changes, because it eliminates spikes without the need for a sample-and-hold circuit in a conventional current-sensing circuit. The contributions of the proposed converter are listed in the following: 1) we have proposed a new current-sensing circuit without voltage divider, which can be operated rail-to-rail and improve the dynamic response; 2) the new current-sensing circuit consisted of no switches and therefore, without switching noises; 3) the new current-sensing circuit without voltage divider has a smaller chip area and a smaller path delay; 4) the proposed current-sensing circuit needs no sample-and-hold circuits to reduce current spikes; 5) the transient response and transient voltage of the proposed converter are better than others' works; and 6) we have designed and implemented a new optimum-damping current-mode buck converter with better performances compared with previous publications.

Single input multiple output (SIMO) buck converter is a good solution to enhance the area efficiency of the power management unit. Because the SIMO type buck converter uses only one inductor to buffer the transferred energy for the multiple output ports, it usually suffers from severe transient cross regulation in a continuous conduction mode. Most of the well‐known approaches to suppress the transient cross regulation are either to create the additional free‐wheeling loop or to refine the controller loop. The control logic is usually quite specific which may not apply to the other controller types controller. A phase sequence interchange (PSI) scheme is proposed to mitigate the transient cross regulation without modifying the original control design. Compared to the other techniques, the proposed method can be easily applied, but not limited to the compensator‐based control or the non‐compensator‐based control in the buck converter. This study starts with the illustration of the reason why the PSI can mitigate the transient cross regulation. Detail designs are then presented to implement the proposed scheme on both the compensator type and the non‐compensator type controls. Experimental results show that the suppression of the cross regulation is comparable to the other state of the arts.

Solar panels are electricity generators that utilize solar energy. One of them is the Azzahra Hydroponic solar panel with a capacity of 200 Wp which has a non-linear output. According to Amri, (2015) this is due to the changing conditions of the sun. To solve the non-linear problem of solar panels, there are 2 types of controllers, namely PWM and MPPT. This study uses the Perturb Observe (PO) method because this method is simpler, has efficiency and a high level of accuracy compared to other methods (Kesler, 2016). Under conditions of intensity S= 1000 and temperature T = 40°, Pmax is 201.5 W, Po is 201.1 W and the time required for MPPT to track is 0.003 seconds, at S=500 T=25, Pmax= 97 ,7 W and Po = 96.4 W and the time required is 0.006 seconds. And in the condition S = 100 T = 10 obtained Pmax = 9.4 W, Po = 9.3 W and the time required for MPPT to track is 0.04 seconds. Based on the simulation results, it can be concluded that the maximum power point tracking (MPPT) simulation design using the perturb and observe (PO) method was successful and MPPT was able to track the maximum power on Azzahra Hydroponic solar panels under conditions of varying intensity and temperature.

In this article, a high-gain bidirectional quadratic dc–dc converter is proposed. This converter is studied under step-up and step-down modes. In each power flow direction, two switches and two antiparallel diodes of the other switches operate. Therefore, the switching losses depend only on the operation of two switches in each direction. The use of coupled inductor in the proposed converter significantly reduces the input and output current ripples of the step-up and step-down modes, respectively, at all operating points of continuous and discontinuous conduction modes (CCM and DCM). The voltage gain of the proposed converter in the step-up mode is as high as that of the cascaded boost converter, and in the step-down mode, the converter voltage gain is similar to that of the cascaded buck converter. Thus, the high-voltage conversion ratio with an appropriate duty-cycle in both power flow directions can be achieved. The operating principles and steady-state analysis of the proposed converter in CCM, DCM, and the boundary-conditions between these modes are discussed in detail. Finally, a prototype of the converter is implemented in the laboratory and the experimental results are presented to validate the effectiveness of the proposed converter.

The increasing consumer electronics, most of which are natively dc loads, demand efficient power conversion from input ac grid to dc loads. Good power quality and unity power factor (UPF) for maintaining a stable grid can be achieved using power factor correction (PFC) circuits. This article proposes a family of single-input multiple-output (SIMO) rectifiers, which can provide one dc output higher and multiple dc outputs lower than the peak voltage of the ac input. Compared to separate conventional rectifiers at every point-of-load, each with a boost-based PFC circuit followed by a buck converter, the proposed topology requires a less number of switches and has inherent shoot-through protection. In this article, the operation of an N -output ( N -switch) rectifier is explained, and its general large-signal and small-signal models are developed. It is further illustrated using a single-input dual-output (SIDO) rectifier. Of the two dc outputs, one dc output voltage is higher, and one is lower than the peak voltage of the ac input. The small-signal model and the control scheme to enforce output voltage regulation and UPF operation are discussed. Experimental results are provided to validate the proposed topology and the control scheme.

This article proposes some new improvements to the traditional constrained predictive fault-tolerant control (FTC) method by enlarging the maximal fault-tolerant admissible region and reducing the online computational complexity. In general, the generalized parameterization of predictive input and event-triggered predictive regulation are integrated into a framework of fault compensation-based dual-mode tube predictive FTC. This predictive FTC scheme has three notable characteristics: 1) The dual-mode FTC consisting of fixed-mode fault compensation and freely predictive adjustments allows most of the calculations to be predetermined offline, while only a simple optimization problem requires to be solved online; 2) the fault-tolerant ability is enhanced by utilizing generalized parameterization of predictive inputs to enlarge the region of attraction of a faulty system; 3) the real-time computational effort of predictive FTC is further reduced by constructing an event-triggered condition to avoid unnecessary online predictive optimization. A case study of a practical synchronous dc–dc Buck converter is given to validate the effectiveness of the proposed predictive FTC method.

Proton exchange membrane fuel cell (PEMFC)/battery hybrid electric vehicle is considered as promising transportation due to its eco-friendly characteristics. This article investigates a fuzzy logic (FL)-based adaptive backstepping sliding-mode control (BSMC) approach to generate stable charging current and voltage for battery charging applications on a non-plug-in PEMFC vehicle. An adaptive BSMC is proposed to address nonlinearities and disturbances caused by dc/dc buck converter, PEMFC, and equivalent load variations of batteries. Moreover, an FL-based approximation is utilized to estimate the time-varying equivalent load of batteries through the adaptive laws obtained by the defined Lyapunov function and can offer assistance estimating the state of charge (SOC) of batteries. Simulation comparisons between a proportional–integral (PI) control and the proposed FL-based adaptive BSMC were executed subsequently under certain conditions to validate the efficacy. Finally, experiments on the PEMFC/battery hybrid power system scaling prototype via NI (PCI-6229)-LabVIEW platform were implemented to test the charging performance of the proposed approach. The comparative results indicated that the FL-based adaptive BSMC method could regulate charging current and voltage against disturbance and uncertainty and estimate the equivalent load of batteries accurately.

This study presents a self‐oscillating fly‐buck converter. The primary objective of this research is to lower the final bill of materials cost of a fly‐buck converter. The fly‐buck converter is based on a relaxation self‐oscillation circuit. The main transformer is updated with two additional auxiliary windings for positive feedback implementation. The turn ratios of these windings are estimated, and criteria for a stable oscillation mode are developed. A switching frequency formula is also provided. Furthermore, an example start‐up circuit is proposed and calculated. Output voltage stabilisation is implemented and demonstrated to work with ±10% variations in input voltage. The experimental data and design procedure are presented along with a comparison of the proposed fly‐buck converter against conventional fly‐buck converters. The converter is optimised for maximum efficiency, with an efficiency of >85% demonstrated at 20 W output power. The proposed self‐oscillating circuit can also be implemented in a conventional synchronous buck converter. The Maxima software code for automated calculation of the converter is supplied as supplemental active media content.

In this paper, a high-order nonlinear disturbance observer-based fractional-order sliding mode control (FOSMC) strategy is proposed for DC/DC buck converters in the presence of mismatched disturbances, ensuring the properties of both stability and dynamic performance. Traditional sliding mode control can deal with matched disturbances while achieving desired closed-loop performance, unfortunately it is particularly sensitive to mismatched disturbances. In the proposed control structure, two nonlinear disturbance observers are constructed to estimate both matched and mismatched disturbances in finite time. Then, the estimated variables are used for the fractional-order sliding mode surface design, where a super twisting sliding mode controller is designed to drive the states of the system to track their desired values. Comparing with the traditional SMC, the proposed method not only reduces the sensitivity of the system to mismatched disturbance, but also improves the transient performance of the system. Simulation and experimental results have comprehensively illustrated the feasibility and effectiveness of the proposed strategy.

The electric vehicle dynamic wireless power transfer (EV-DWPT) system effectively solves the mileage anxiety problem of electric vehicles (EVs). However, due to the change of mutual inductance in the process of vehicle driving, the output power of the system is unstable, which is not conducive to charging the battery. Therefore, this paper proposes a power stability control method of EV-DWPT based on sliding mode control (SMC) and supercapacitor. The Buck converter is used to control the output power, and the SMC method is used to suppress power fluctuation. The simulation and experimental results show that the SMC has good robustness and can effectively resist the system parameter perturbation caused by the change of mutual inductance. In addition, the overshoot of the system can be reduced from 50 to 30% with the utilization of the supercapacitor, which verifies the effectiveness of the proposed method.

In this paper, an optimal proportional, integral, derivative and acceleration (PIDA) controller design based on Bode’s ideal reference model and a novel modified Lévy flight distribution (mLFD) algorithm is proposed for buck converter system. The modification of the original Lévy flight distribution (LFD) algorithm was achieved by improving exploration and exploitation capabilities of the algorithm through incorporation of opposition-based learning mechanism and hybridizing with simulated annealing algorithm, respectively. The modified algorithm was used to tune the gains of the PIDA controller in order to operate a buck converter system that is mimicking the response of the Bode’s ideal reference model. Both the proposed novel algorithm and its PIDA controller design implementation for buck converter were confirmed through various tests and extensive analyses of statistical and non-parametric tests, convergence profile, transient and frequency responses, disturbance rejection, robustness, and time delay response. The comparative results with the state-of-the-art algorithms of manta ray foraging optimization, arithmetic optimization algorithm and the original LFD algorithm have shown that the proposed mLFD algorithm performs better than the compared ones in all assessments even when different well-known performance indices are used. The proposed Bode’s ideal reference model-based optimal PIDA control design with novel mLFD algorithm was also compared with other design approaches using the same buck converter system available in the literature. The proposed mLFD algorithm-based design approach has also shown greater effectiveness compared to other available methods, as well.

The nonlinearities and unmodeled dynamics inevitably degrade the quality and reliability of power conversion, and as a result, pose big challenges on higher-performance voltage stabilization of dc–dc buck converters. The stability of such power electronic equipment is further threatened when feeding the nonideal constant power loads (CPLs) because of the induced negative impedance specifications. In response to these challenges, the advanced regulatory and technological mechanisms associated with the converters require to be developed to efficiently implement these interface systems in the microgrid configuration. This article addresses an intelligent proportional-integral based on sliding mode (SM) observer to mitigate the destructive impedance instabilities of nonideal CPLs with time-varying nature in the ultralocal model sense. In particular, in the current article, an auxiliary deep deterministic policy gradient (DDPG) controller is adaptively developed to decrease the observer estimation error and further ameliorate the dynamic characteristics of dc–dc buck converters. The design of the DDPG is realized in two parts: (i) an actor-network which generates the policy commands, while (ii) a critic-network evaluates the quality of the policy command generated by the actor. The suggested strategy establishes the DDPG-based control to handle for what the iPI-based SM observer is unable to compensate. In this application, the weight coefficients of the actor and critic networks are trained based on the reward feedback of the voltage error, by using the gradient descent scheme. Finally, to investigate the merits and implementation feasibility of the suggested method, some experimental results on a laboratory prototype of the dc–dc buck converter, which feeds a time-varying CPL, are presented.

Multiloop constant on-time (COT) controlled buck converter uses two weight resistors for sensing inductor current and detecting output voltage in its inner loop. When an output capacitor with a small equivalent series resistance (ESR) is employed, the converter will suffer the risk of instability due to different weight settings of inductor current and output voltage using a proportional–integral (PI) compensation gain in the outer voltage loop. However, no attention has been paid for their stability effects, which are important for designing the inner loop and outer voltage loop. To address these issues, a piecewise linear model is established for multiloop COT-controlled buck converter. Circuit parameter-related bifurcation behaviors and control weight-related dynamical distributions are explored to demonstrate these stability effects. Furthermore, by deriving an approximate discrete model, a control weight-related stability criterion is expressed explicitly, from which stability boundaries for dividing the normally stable and abnormally unstable operation parameter regions are thereby yielded. Besides, control weight-related transient performances under different circuit parameter settings are analyzed. Finally, PSIM circuit simulations and hardware circuit experiments verify the theoretical analysis well.

This letter proposes a nonlinear mathematical model for a zero-current-switching (ZCS) pulse width modulation (PWM) Buck converter and obtains the approximate analytical solutions of state variables using the equivalent small parameter method (ESPM). First, the operating modes of the converter are analyzed, and the equivalent circuit model together with a unified nonlinear mathematical description can be derived. Then, ESPM is adopted to solve this model, and approximate analytical solutions of state variables in both transient process and steady-state operation are obtained. The acquired results are verified by simulations and experiments finally. Since the ESPM combines the peculiarity of the perturbation method and harmonic balance method, the results obtained by ESPM are accurate and have obvious advantages compared with other methods.

This article presents an integrated magnetic buck–boost converter (IMBBC) with a positive output voltage. The input inductor, two power transfer inductors, and an auxiliary inductor in the ripple cancellation network of this converter are integrated in one magnetic core, and an additional capacitor is included for output current ripple cancellation. The IMBBC inherently operates in the continuous conduction mode and exhibits a nonpulsating input current and a very low ripple output current, thereby not only decreasing the current stress on both the input and output capacitors but also reducing the output voltage ripple. Because the input of the IMBBC is connected to the output during the switch- on period (similar to the operation of buck converters), the proposed IMBBC overcomes the right-half-plane zero problem in the buck or boost mode, thus achieving a higher dynamic performance. The use of the magnetic integration technique not only helped realize the aforementioned performance, but can also help reduce the weight and volume of dc–dc converters. Finally, the feasibility and effectiveness of the proposed topology and design approaches are experimentally verified.

As aerospace applications, high reliability and low power consumption operation of the brushless direct current (BLDC) motor for the magnetically suspended control moment gyro (MSCMG) is the primary consideration. To guarantee reliability, the sensorless control without position sensors is adopted. Due to the phase lag caused by hardware and software, the commutation error is inevitable. In order to reduce losses, this article proposes a fast commutation error compensation method to improve commutation accuracy. First, the control topology of the BLDC motor with a buck converter and the commutation point detection circuit are presented. Then, the conducting back electromotive force (EMF) contained in a novel derived dc-link voltage expression is estimated through an extended state observer (ESO). Finally, the commutation error is extracted from the conducting back EMF for compensation. Different from the conventional closed-loop correction method based on the back EMF symmetry, the proposed commutation error compensation method can obtain the commutation error within only one commutation cycle by a continuous estimation with the ESO. The effectiveness of the proposed fast commutation error compensation method was evaluated with an MSCMG system.

A tapped-inductor buck dc–dc converter uses the tapped-inductor to further step-down the output voltage. This article presents a small-signal model of a tapped-inductor buck dc–dc converter by using the circuit averaging technique. The obtained nonlinear model is linearized to derive its linear large-signal, small-signal, and dc models. The small-signal model is then used to derive open-loop transfer functions namely, control-to-output voltage transfer function and the input-to-output voltage transfer function. MATLAB was used to obtain their respective Bode plots and later validated experimentally using a gain-phase network analyzer.